Dynamic reconfiguration of solid state memory device to replicate and time multiplex data over multiple data interfaces
View Patent ↗Multiple interfaces dedicated to individual logic circuits such as memory arrays are capable of being dynamically reconfigured from operating separately and in parallel to operating in a more collective manner to ensure that data associated with all of the logic circuits will be communicated irrespective of a failure in any of the interfaces. Specifically, a plurality of interfaces, each of which being ordinarily configured to communicate data associated with an associated logic circuit in parallel with the other interfaces, may be dynamically reconfigured, e.g., in response to a detected failure in one or more of the interfaces, to communicate data associated with each of the interfaces over each of at least a subset of the interfaces in a time multiplexed and replicated manner.
1. A method of communicating data over a plurality of interfaces, wherein each interface is configured to communicate data associated with a respective logic circuit among a plurality of logic circuits, the method comprising:
communicating data associated with the plurality of logic circuits in parallel over the plurality of interfaces; and
after communicating the data associated with the plurality of logic circuits in parallel over the plurality of interfaces, dynamically reconfiguring the plurality of interfaces to time multiplex and replicate data associated with each of the plurality of logic circuits over multiple interfaces from the plurality of interfaces.
2. The method of claim 1 , wherein each interface is dedicated to the respective logic circuit with which the interface is associated prior to being dynamically reconfigured.
3. The method of claim 1 , wherein each logic circuit comprises a memory array, and wherein each interface comprises a data interconnect.
4. The method of claim 3 , further comprising selecting valid data from the replicated data communicated by the plurality of interfaces.
5. The method of claim 4 , wherein selecting the valid data includes selecting the valid data according to a voting protocol.
6. The method of claim 3 , further comprising communicating deterministic data patterns over the plurality of interfaces to identify a failed interface.