IP Library Granted Patent US 7,193,280
Granted Patent B2
US 7,193,280 · App. 11/039,543 · Granted Mar 20, 2007

Indium oxide conductive film structures

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Quick Facts
Patent No.
US 7,193,280
App. No.
11/039,543
Granted
Mar 20, 2007
Kind
B2
Abstract

One-transistor ferroelectric memory devices using an indium oxide film (In 2 O 3 ), an In 2 O 3 film structure, and corresponding fabrication methods have been provided. The method for controlling resistivity in an In 2 O 3 film comprises: depositing an In film using a PVD process, typically with a power in the range of 200 to 300 watts; forming a film including In overlying a substrate material; simultaneously (with the formation of the In-including film) heating the substrate material, typically the substrate is heated to a temperature in the range of 20 to 200 degrees C.; following the formation of the In-including film, post-annealing, typically in an O2 atmosphere; and, in response to the post-annealing: forming an In 2 O 3 film; and, controlling the resistivity in the In 2 O 3 film. For example, the resistivity can be controlled in the range of 260 to 800 ohm-cm.

Claims (33)

1. A one-transistor ( 1 T) memory device using an indium oxide (In 2 O 3 ) film as a gate insulator, the device comprising:

a CMOS transistor gate, source, drain, and channel regions;

a gate insulator formed from an In 2 O 3 thin film, interposed between the channel region and the gate, having a resistivity in the range of 260 to 800 ohm-cm;

a memory cell film overlying the gate electrode; and,

a top electrode overlying the memory cell film.

2. The device of claim 1 wherein the In 2 O 3 thin film includes crystals having a grain size in the range of 3 to 30 nanometers (nm).

3. The device of claim 1 wherein the In 2 O 3 thin film has a thickness in the range 5 to 100 nm.

4. The device of claim 1 further comprising:

a material, interposed between the channel and the In 2 O 3 film, selected from the group including platinum (Pt), iridium (If), other noble Aetals, silicon (Si), high-k oxides, and silicon dioxide (SiO 2 ).

5. The device of claim 1 wherein the gate has a gate channel length of 0.1 micron; and,

wherein the In 2 O 3 film gate insulator has a resistivity of 700 ohm-cm.

6. The device of claim 1 wherein the gate has a gate channel length of 100 microns; and,

wherein the In 2 O 3 film gate insulator has a resistivity of 300 ohm-cm.

7. The device of claim 1 wherein the gate has a gate channel length in the range of 1 to 10 microns; and, wherein the In 2 O 3 film gate insulator has a resistivity in the range of 400 to 300 ohm-cm.

8. A one-transistor ( 1 T) memory device using an indium oxide (In 2 O 3 ) film as an insulator, the device comprising:

a CMOS transistor gate, source, drain, and channel regions;

an insulator formed from an In 2 O 3 thin film overlying the gate, having a resistivity in the range of 260 to 800 ohm-cm;

a memory cell film overlying the In 2 O 3 thin film; and,

a top electrode overlying the memory cell film.

9. The device of claim 8 wherein the 1 n 2 O 3 thin film includes crystals having a grain size in the range of 3 to 30 nanometers (nm).

10. The device of claim 8 wherein the In 2 O 3 thin film has a thickness in the range 5 to 100 nm.

11. The device of claim 8 further comprising:

a material, interposed between the memory cell film and the In 2 O 3 film, selected from the group including platinum (Pt), iridium (Ir), other noble metals, silicon (Si), high-k oxides, and silicon dioxide (SiO 2 ).

12. The device of claim 8 wherein the gate has a gate channel length of 0.1 micron; and,

wherein the In 2 O 3 film has a resistivity of 700 ohm-cm.

13. The device of claim 8 wherein the gate has a gate channel length of 100 microns; and,

wherein the In 2 O 3 film has a resistivity of 300 ohm-cm.

14. The device of claim 8 wherein the gate has a gate channel length in the range of 1 to 10 microns; and,

wherein the In 2 O 3 film has a resistivity in the range of 400 to 300 ohm-cm.

15. An indium oxide (In 2 O 3 ) film structure comprising:

a substrate; and,

an In 2 O 3 film overlying the substrate having a resistivity in the range of 260 to 800 ohm-cm.

16. The In 2 O 3 film structure of claim 15 wherein the substrate is selected from the group including platinum (Pt), iridium (Ir), other noble metals, silicon (Si), high-k oxides, and silicon dioxide (SiO 2 ).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2007
From: SHARP LABORATORIES OF AMERICA, INC.
To: SHARP KABUSHIKI KAISHA
Reel/Frame 019795/0661 →