IP Library Granted Patent US 7,443,213
Granted Patent B2
US 7,443,213 · App. 11/040,078 · Granted Oct 28, 2008

Staged locking of two phase locked loops

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Quick Facts
Patent No.
US 7,443,213
App. No.
11/040,078
Granted
Oct 28, 2008
Kind
B2
Abstract

Data synchronization is achieved in devices which transmit and/or receive audio and/or video data through the staged locking of phase locked loops. According to an exemplary embodiment, a transmitter includes a serial data source. An encoder provides encoded data and includes a first PLL. A controller includes a second PLL which enables generation of a clock signal. The controller is coupled between the serial data source and the encoder for providing the clock signal to the encoder. The first PLL of the encoder locks to the clock signal.

Claims (19)

1. A device, comprising:

means for receiving data from a serial data source;

encoding means for encoding said data, said encoding means including a first phase locked loop wherein said first phase locked loop is adapted to lock to a clock signal for synchronizing said data;

control means including a second phase lock loop generating a reference signal responsive to said data for use in generating said clock signal, said control means coupled between said serial data source and said encoding means for providing said clock signal to said encoding means and determining whether said first phased locked loop is locked; and

transmission means for transmitting said data from the serial data source in response to said control means determining said first phased lock loop is locked.

2. The device of claim 1 , further comprising means for enabling wireless transmission of said encoded data.

3. The device of claim 1 , wherein said encoded data includes audio data.

4. The device of claim 1 , wherein said encoded data includes video data.

5. The device of claim 1 , wherein said device is a transmitter.

6. A method for providing data synchronization, comprising:

receiving serial data;

generating a first clock signal responsive to said serial data; generating a second clock signal in response a comparison comprising said first clock signal; and

enabling transmission of said serial data upon determination that said second clock signal is substantially synchronized with said first clock signal.

7. The method of claim 6 , further comprising the steps of:

generating encoded data responsive to said generated frequency; and

enabling wireless transmission of said encoded data.

8. The method of claim 7 , wherein said encoded data includes audio data.

9. The method of claim 7 , wherein said encoded data includes video data.

10. The method of claim 6 , wherein said clock signal is generated responsive to a start of frame signal included in said serial data.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME FROM INTERDIGITAL CE PATENT HOLDINGS TO INTERDIGITAL CE PATENT HOLDINGS, SAS. PREVIOUSLY RECORDED AT REEL: 47332 FRAME: 511. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 28, 2024
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS, SAS
Reel/Frame 066703/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2018
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS
Reel/Frame 047332/0511 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2008
From: THOMSON LICENSING S.A.
To: THOMSON LICENSING
Reel/Frame 021562/0811 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2005
From: CRAWLEY, CASIMIR JOHAN
To: THOMSON LICENSING S.A.
Reel/Frame 016221/0481 →