Semiconductor device and method of manufacturing the same
View Patent ↗A method of manufacturing a semiconductor device includes a step of forming a device region 5 that is separated by a device-separation insulating film 4 formed in a part of an SOI layer, a step of forming a gate insulating film 6 a on a device region 5 so that the device region 5 can be exposed on both sides of the gate insulating film 6 a , a step of forming a gate electrode 7 a with polysilicon on the gate insulating film 6 a , a step of adjusting the area of exposed silicon so that the area of exposed silicon can be a prescribed area by forming at least either a pseudo region 5 b or a pseudo electrode 7 b to control the growth rate in growing an epitaxial layer 9 , and a step of conducting low-temperature epitaxial growth of silicon.
1. A method of manufacturing a semiconductor device comprising:
preparing a substrate including a first insulating film and a first layer including a first region and a second region separated by said first region, said first layer being formed on said first insulating film, said first layer comprising a first substance;
forming a second insulating film in said first region in said first layer;
forming a third insulating film to expose a periphery of said second region on said second region;
forming a first electrode having said first substance on said third insulating film;
adjusting an exposed area of said first substance to a prescribed area by forming either a third region being formed on a surface of said second insulating film and being comprised of said first substance to expose a surface of said third region in an epitaxial growth, or said third region being buried in said second insulating film and being comprised of said first substance said surface of said third region being exposed in said epitaxial growth; and
conducting epitaxial growth of said first substance on said first electrode, to expose said second region on a periphery of said third insulating film and said third region.
2. The method of manufacturing a semiconductor device according to claim 1 , wherein forming said second insulating film includes a local oxidation of silicon method.
3. The method of manufacturing a semiconductor device according to claim 2 , wherein adjusting said exposed area includes forming a pseudo electrode on said second insulating film, or forming a pseudo region buried in said second insulating film.
4. The method of manufacturing a semiconductor device according to claim 3 , wherein adjusting said exposed area includes forming said pseudo electrode.
5. The method of manufacturing a semiconductor device according to claim 4 , wherein said first substance is silicon, and silicon forming said second region is silicon single crystal, and silicon forming said first electrode is polycrystalline silicon.
6. The method of manufacturing a semiconductor device according to claim 5 , wherein said first electrode is a gate electrode of an MOS transistor that operates in a full depletion layer.
7. The method of manufacturing a semiconductor device according to claim 3 , wherein adjusting said exposed area includes forming said pseudo region.
8. The method of manufacturing a semiconductor device according to claim 7 , wherein said first substance is silicon, and silicon forming said second region is silicon single crystal, and silicon forming said first electrode is polycrystalline silicon.
9. The method of manufacturing a semiconductor device according to claim 8 , wherein said first electrode is a gate electrode of an MOS transistor that operates in a full depletion layer.
10. The method of manufacturing a semiconductor device according to claim 3 , wherein adjusting said exposed area includes forming both said pseudo electrode and said pseudo region.
11. The method of manufacturing a semiconductor device according to claim 10 , wherein said first substance is silicon, and silicon forming said second region is silicon single crystal, and silicon forming said first electrode is polycrystalline silicon.
12. The method of manufacturing a semiconductor device according to claim 11 , wherein said first electrode is a gate electrode of an MOS transistor that operates in a full depletion layer.
13. The method of manufacturing a semiconductor device according to claim 1 , wherein a pseudo region that is separated by said second insulating film and is comprised of said first substance is formed by forming said second insulating film with a shallow trench isolation method when forming said second insulating film, and adjusting said exposed area includes forming said pseudo region when forming said second insulating film.
14. The method of manufacturing a semiconductor device according to claim 13 , wherein said first substance is silicon, and silicon forming said second region is silicon single crystal, and silicon forming said first electrode is polycrystalline silicon.
15. The method of manufacturing a semiconductor device according to claim 14 , wherein said first electrode is a gate electrode of an MOS transistor that operates in a full depletion layer.
16. The method of manufacturing a semiconductor device according to claim 15 , wherein adjusting said exposed area further includes forming a pseudo electrode on said second insulating film.
17. The method of manufacturing a semiconductor device according to claim 16 , wherein said first substance is silicon, and silicon forming said second region is silicon single crystal, and silicon forming said first electrode is polycrystalline silicon.
18. The method of manufacturing a semiconductor device according to claim 17 , wherein said first electrode is a gate electrode of an MOS transistor that operates in a full depletion layer.