IP Library Patent Application 11046232
Patent Application
App. No. 11/046,232

Universal single chip set-top box

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Quick Facts
Patent No.
US None
App. No.
11/046,232
Abstract

A universal integrated set-top box is implemented on single semiconductor substrate. The set-top box includes video and audio baseband functions on the common substrate. The set-top box is a universal set-top box chip that can process and demodulate multiple different types of inputs including satellite, cable, Internet, or other device inputs. This can be accomplished because the set-top box does not have a specific tuner integrated on the substrate, and therefore can take generic down-converted inputs, e.g. MPEG packets. In other words, an external tuner/decoder (of any type) can be connected to the set-top box input for processing, including for example, a satellite tuner, cable tuner, or any other type of tuner/decoder that can produce digital outputs (e.g. MPEG packets) for further processing in a set-top box. The set-top box also includes Ethernet and USB connections so as to receive inputs from other set-top boxes, Internet device, or other devices, with similar types of connections.

Claims (44)

1 . A set-top box, comprising:

a common substrate;

an input port for receiving a digital input signal;

a divider module, coupled to said input, separating a video portion from an audio portion of said digital input signal;

a video module, coupled to said divider module output, for processing said video portion of said digital input signal;

an audio module, coupled to said divider module output, for processing said audio portion of said digital input signal;

an Ethernet interface; and

a universal serial bus (USB) interface;

said input port, said divider module, said video module, said audio module, and said Ethernet interface, all disposed on said common substrate.

2 . The set-top box of claim 1 , wherein said input port is coupled to one of:

a satellite receiver, a cable receiver, and a DSL receiver, one of which provides said digital input signal.

3 . The set-top box of claim 1 , further comprising a first memory interface disposed on said common substrate.

4 . The set-top box of claim 3 , wherein said digital input signal is down-loaded to a first external memory device connected to said first memory interface.

5 . The set-top box of claim 4 , further comprising a second memory interface disposed on said common substrate, said digital input signal temporarily down-loaded to said second memory interface prior to storage in said first external memory device.

6 . The set-top box of claim 5 , wherein said first memory interface is a hard drive interface and said first external memory device is a hard drive, and said second memory interface is a DRAM interface, and said second external memory device is a DRAM.

7 . The set-top box of claim 1 , further comprising a satellite decoder coupled to said input.

8 . The set-top box of claim 1 , wherein said common substrate is a CMOS substrate.

9 . The set-top box of claim 1 , wherein said video module receives said video portion and generates a video output from said video portion.

10 . The set-top box of claim 1 , wherein said audio module receives said audio portion and generates an audio output from said audio portion.

11 . The set-top box of claim 1 , wherein said digital input signal includes Moving Picture Experts Group (MPEG) packets.

12 . The set-top box of claim 11 , wherein said divider module separates video MPEG packets from audio MPEG packets.

13 . The set-top box of claim 12 , wherein said video module processes said video MPEG packets to produce a video output, and said audio module processes said audio MPEG packets to produce an audio output.

14 . The set-top box of claim 13 , wherein said video module includes the following:

a video decoder that decodes said video MPEG packets;

a graphics module, coupled to an output of said video decoder, that adds text to said video MPEG packets;

a video encoder, coupled to an output of said graphics module; and

a video digital-to-analog converter that converts an output of said video encoder to analog.

15 . The set-top box of claim 13 , wherein said audio module includes:

an MPEG audio decoder that receives and decodes said audio MPEG packets; and

an audio digital-to-analog converter, coupled to an output of said MPEG audio decoder, that converts an output of said MPEG audio decoder to analog.

16 . The set-top box of claim 1 , wherein said Ethernet Interface is configured to receive a second digital input signal over an Internet connection for processing in said set-top box.

17 . The set-top box of claim 1 , wherein said USB interface is configured to receive a third digital input signal over a USB cable or a wireless USB connection.

18 . The set-top box of claim 1 , further comprising a peripherals interface, disposed on said common substrate.

19 . The set-top box of claim 1 , wherein the digital input signal represents television programming.

20 . A method of processing a digital input signal in a set-top box, comprising:

receiving the digital input signal;

separating a video portion of the digital input signal from an audio portion of the digital input signal;

processing the video portion of the digital input signal to produce a video output; and

processing the audio portion of the digital input signal to produce an audio output.

21 . The method of claim 20 , wherein the digital input signal is received from one of the following: a satellite receiver, a cable receiver, a DSL receiver, an Ethernet connection, and a USB connection.

22 . The method of claim 20 , further comprising the steps of:

storing the digital input signal to an external memory device.

23 . The method of claim 20 , wherein the external memory device is a hard drive.

24 . The method of claim 23 , further comprising the step of temporarily storing the digital input signal to a DRAM prior to storage in the hard drive device.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2005
From: CHEN, JOEY Y.; FIORENZA, JOSEPH J.; TURNER, TONY M.
To: BROADCOM CORPORATION
Reel/Frame 016240/0669 →