Techniques for using interleaved encoders to obtain modulation constraints
View Patent ↗Techniques are provided for applying modulation constraints to data streams divided into separate interleaved portions. The even and odd bits in a data stream are separated into two data paths. A first modulation encoder encodes the even bits according to a first constraint. A second modulation encoder encodes the odd bits according to a second constraint. The two encoded data streams are then interleaved to form one data stream. The modulation encoders can encode the two data paths using Fibonacci encoding.
1. A disk drive system comprising:
a demultiplexer that separates even bits and odd bits in the data into two separate data paths;
a first Fibonacci modulation encoder that encodes the even bits to generate constrained even bits;
a second Fibonacci modulation encoder that encodes the odd bits to generate constrained odd bits; and
a multiplexer that interleaves the constrained even bits and the constrained odd bits.
2. The disk drive system according to claim 1 wherein the first modulation encoder maps N−1 of the even bits to N constrained even bits, and the second modulation encoder maps N−1 of the odd bits to N constrained odd bits.
3. The disk drive system according to claim 1 wherein output data of the multiplexer has a constraint G that equals 2×Ge, if Ge=Go,
wherein Ge is a constraint applied by the first modulation encoder to the even bits to generate the constrained even bits, and
Go is a second constraint that the second modulation encoder applies to the odd bits to generate the constrained odd bits.
4. The disk drive system according to claim 3 wherein the constraint G equals 1+2×min(Ge, Go), if Ge≠Go.
5. The disk drive system of claim 1 wherein a data sequence outputted by the multiplexer satisfies G and I constraints.
6. The disk drive system of claim 1 wherein a modulation rate of a data sequence outputted by the multiplexer is (N−1)/N, with 2(N−1) representing the number of bits in the data.
7. A disk drive controller chipset comprising:
a demultiplexer that separates even bits and odd bits in the data into two separate data paths;
a first Fibonacci modulation encoder that maps N-bit vectors corresponding to the even bits to a first vector, wherein the first vector has no more than N constrained bits;
a second Fibonacci modulation encoder that maps N-bit vectors corresponding to the odd bits to a second vector, wherein the second vector has no more than N constrained bits.
8. The disk drive controller chipset defined in claim 7 further comprising:
a multiplexer that interleaves bits corresponding to the first and second vector.
9. The disk drive controller chipset of claim 8 wherein a data sequence outputted by the multiplexer satisfies G and I constraints.
10. The disk drive controller chipset of claim 8 wherein the modulation rate of a data sequence outputted by the multiplexer is (N−1)/N, with 2(N−1) representing the number of bits in the data.
11. A method for applying modulation constraints to data, the method comprising:
separating even bits and odd bits in a codeword into two data paths;
applying a first modulation constraint to the even bits to generate constrained even bits using Fibonacci codes;
applying a second modulation constraint to the odd bits to generate constrained odd bits using Fibonacci codes; and
interleaving the constrained even bits with the constrained odd bits.
12. The method according to claim 11 wherein applying the first modulation constraint to the even bits comprises mapping N−1 of the even bits to N constrained even bits, and applying the second modulation constraint to the odd bits comprises mapping N−1 of the odd bits to N constrained odd bits.
13. The method according to claim 12 wherein constrained interleaved even and odd bits have a constraint G that equals 2×Ge, if Ge=Go, and wherein Ge is the first modulation constraint, and Go is the second constraint.
14. The method according to claim 13 wherein the constraint G equals 1+2×min(Ge, Go), if Ge≠Go.
15. The method of claim 11 wherein a data sequence comprising constrained even bits and constrained odd bits which are interleaved together satisfies G and I constraints.
16. The method of claim 11 wherein the modulation rate of a data sequence comprising constrained even bits and constrained odd bits which are interleaved together is (N−1)/N, with 2(N−1) representing the number of bits in the codeword.