IP Library Granted Patent US 7,180,383
Granted Patent B2
US 7,180,383 · App. 11/051,221 · Granted Feb 20, 2007

Arrangement with a capacitor which can be connected into a circuit and disconnected therefrom and associated method

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Quick Facts
Patent No.
US 7,180,383
App. No.
11/051,221
Granted
Feb 20, 2007
Kind
B2
Abstract

An arrangement and a method for connecting a capacitor into a circuit and disconnecting it therefrom are disclosed. The capacitor includes two capacitor elements, each with a main terminal and an auxiliary terminal. The auxiliary terminals are connected to one another at a reference node to which a control signal can be coupled as a function of the desired capacitance value. The capacitance value is tapped at the main terminals of the capacitor elements. When the capacitor is switched on, a high quality level is obtained, and when the capacitor is switched off, low parasitic capacitance components are obtained. For this reason the described arrangement is particularly suitable for use in voltage-controlled oscillators.

Claims (50)

1. A capacitor arrangement that is operable to be connected to and disconnected from a circuit, comprising:

a first capacitor element having a main terminal and an auxiliary terminal;

a second capacitor element having a main terminal and an auxiliary terminal;

wherein the first and second capacitor elements each have one control electrode connected to its respective main terminal, and each have a channel with a controllable conductivity connected to the auxiliary terminal;

wherein the auxiliary terminals of the first and second capacitor elements are connected to one another at a reference node;

wherein the main terminal of the first capacitor element and the main terminal of the second capacitor element form terminals of the capacitor;

wherein a control input is coupled to the reference node, and based upon a state thereof is operable to alter a capacitance of the capacitor, thereby selectively connecting or disconnecting the capacitor to or from the circuit, respectively;

an inverter configured to couple the control input to the reference node; and

a driver transistor having a controlled path and configured to selectively connect the reference node to a reference potential terminal, the driver transistor comprising a control terminal connected to the control input of the arrangement.

2. The arrangement of claim 1 , wherein the first capacitor element and the second capacitor element comprise unipolar transistors having gate terminals that form the main terminals, and having source and drain terminals that form the auxiliary terminals and are connected to one another and to the reference node.

3. The arrangement of claim 2 , wherein the transistors comprise n-channel metal oxide semiconductor transistors.

4. The arrangement of claim 1 , further comprising a capacitor connected between the reference node and the reference potential terminal of the arrangement.

5. The arrangement of claim 1 , wherein the arrangement is constructed using integrated circuit technology.

6. A method for connecting and disconnecting a capacitor to and from a circuit, respectively, comprising:

providing a first and a second capacitor element comprising a controllable channel having a conductivity that is a function of a potential difference present between main terminals and auxiliary terminals thereof;

applying a control signal to the auxiliary signals to vary the potential difference;

tapping a capacitance between the two main terminals, wherein a value of the capacitance is a function of the control signals;

inverting the control signal before it is applied to the auxiliary terminals; and

providing a low-impedance connection between the controllable channels and a reference potential terminal when the control signal is at a level which generates low-impedance controllable channels.

7. A variable capacitor, comprising:

two transistors coupled together in parallel, wherein gate terminals of the transistors form terminals of the capacitor, and wherein the source/drains of the two transistor are all connected together to form a reference node; and

a control circuit configured to vary a potential at the reference node between a supply potential and a reference potential, thereby varying a capacitance associated with the two transistors;

wherein the control circuit further comprises:

a driver transistor coupled between the reference node and the reference potential, and having a control terminal coupled to a control signal input; and

an inverter circuit having an input coupled to the control signal input, and an output coupled to the reference node,

wherein the inverter circuit and driver transistor are operable, in concert, to pull the reference node down to the reference potential based on a state of a control signal at the control signal input.

8. The variable capacitor of claim 7 , the control circuit further comprising a capacitor coupled in parallel with the driver transistor, wherein the capacitor is operable to act like a short circuit at high frequencies, thereby ensuring that at high frequencies the reference node is at the reference potential.

9. The variable capacitor of claim 7 , wherein the control circuit further comprises:

a diode coupled between the supply potential and the inverter circuit; and

a backup capacitor coupled to the inverter circuit, and configured to be selectively charged to the supply potential,

wherein the diode is configured to supply the supply potential to the reference node based on a state of the inverter circuit, and

wherein the diode and backup capacitor operate as a low pass filter to reduce noise at the reference node when the supply potential is provided thereto.

10. A capacitor arrangement that is operable to be connected to and disconnected from a circuit, comprising:

a first capacitor element having a main terminal and an auxiliary terminal;

a second capacitor element having a main terminal and an auxiliary terminal;

wherein the first and second capacitor elements each have one control electrode connected to its respective main terminal, and each have a channel with a controllable conductivity connected to the auxiliary terminal;

wherein the auxiliary terminals of the first and second capacitor elements are connected to one another at a reference node;

wherein the main terminal of the first capacitor element and the main terminal of the second capacitor element form terminals of the capacitor;

wherein a control input is coupled to the reference node, and based upon a state thereof is operable to alter a capacitance of the capacitor, thereby selectively connecting or disconnecting the capacitor to or from the circuit, respectively;

an inverter configured to couple the control input to the reference node; and

wherein the inverter comprises a supply terminal and a backup capacitor connected thereto.

11. The arrangement of claim 10 , further comprising a diode connected between a supply potential terminal of the arrangement and the supply terminal of the inverter.

12. The arrangement of claim 11 , further comprising a switch connected in parallel with the diode and configured to selectively charge the backup capacitor.

13. A method for connecting and disconnecting a capacitor to and from a circuit, respectively, comprising:

providing a first and a second capacitor element comprising a controllable channel having a conductivity that is a function of a potential difference present between main terminals and auxiliary terminals thereof;

applying a control signal to the auxiliary signals to vary the potential difference;

tapping a capacitance between the two main terminals, wherein a value of the capacitance is a function of the control signal; and

further comprising at least one of:

providing capacitive stabilization of a potential applied to the auxiliary terminals; or providing capacitive backup of a supply potential of an inverter operable to invert the control signal.

14. The method of claim 13 , wherein providing capacitive backup comprises recharging a backup capacitor from a supply voltage via a diode.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →