IP Library Granted Patent US 7,580,684
Granted Patent B2
US 7,580,684 · App. 11/055,589 · Granted Aug 25, 2009

Programmable radio transceiver

Assignee: BitWave Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,580,684
App. No.
11/055,589
Granted
Aug 25, 2009
Kind
B2
Abstract

A fully integrated, programmable mixed-signal radio transceiver comprising a radio frequency integrated circuit (RFIC) which is frequency and protocol agnostic with digital inputs and outputs, the radio transceiver being programmable and configurable for multiple radio frequency bands and standards and being capable of connecting to many networks and service providers. The RFIC includes a tunable resonant circuit that includes a transmission line having an inductance, a plurality of switchable capacitors configured to be switched into and out of the tunable resonant circuit in response to a first control signal, and at least one variable capacitor that can be varied in response to a second control signal, wherein a center resonant frequency of the resonant circuit is electronically tunable responsive to the first and second control signals that control a first capacitance value of the plurality of switchable capacitors and a second capacitance value of the at least one variable capacitor.

Claims (26)

1. An integrated evaluation and test module for a radio transceiver implemented on a semiconductor substrate, the radio transceiver comprising a receiver chain that generates a radio frequency signal, the integrated evaluation and test module being integrated on the semiconductor substrate with the radio transceiver and the integrated evaluation and test module comprising:

a control input adapted to receive a digital control signal;

a signal input adapted to receive a digitized version of the radio frequency signal from the receiver chain of the radio transceiver;

a processing module coupled to the signal input and adapted to receive and process the digitized version of the radio frequency signal from the receiver chain of the radio transceiver, and to provide a digital output signal;

a reference generator adapted to generate a digital reference signal based on information contained in the digital control signal;

a comparator coupled to the reference generator and to the processing module and adapted to receive the digital output signal and the digital reference signal, the comparator being configured to compare the digital output signal with the digital reference signal and to generate an error signal that identifies discrepancies between the digital output signal and the digital reference signal; and

an adjustment module coupled to the comparator and adapted to receive the error signal from the comparator and to generate digital adjustment data based at least in part on the error signal, the adjustment module being further adapted to provide the digital adjustment data to at least one component of the receiver chain of the radio transceiver to adjust at least one parameter of the at least one component so as to modify the radio frequency signal to reduce the error signal.

2. The integrated evaluation and test module of claim 1 , wherein the processing module comprises a processor configured to perform a Fourier transform on the digitized version of the radio frequency signal from the receiver chain of the radio transceiver to provide the digital output signal comprising frequency domain information about the radio frequency signal.

3. The integrated evaluation and test module of claim 1 , wherein the digital reference signal contains frequency domain information corresponding to desired characteristics of the radio frequency signal.

4. The integrated evaluation and test module of claim 3 , wherein the comparator is configured to compare the frequency domain information from the digital output signal with the frequency domain information contained in the digital reference signal and to generate the error signal which contains information about frequency domain variations between the digital output signal and the digital reference signal.

5. The integrated evaluation and test module of claim 4 , wherein the adjustment module includes a finite state machine.

6. A method of testing performance of at least one component of a receiver chain for compliance with a selected communication standard, using an integrated evaluation and test module that is integrated on a semiconductor substrate with the receiver chain, the method comprising:

receiving at the integrated evaluation and test module a digital control signal;

receiving at the integrated evaluation and test module a digitized version of a radio frequency signal from the receiver chain;

processing the digitized version of the radio frequency signal from the receiver chain to provide a digital output signal;

generating a digital reference signal based on information contained in the digital control signal;

comparing the digital output signal with the digital reference signal;

generating an error signal based on the comparison that identifies discrepancies between the digital output signal and the digital reference signal;

generating digital adjustment data based on the error signal; and

providing the digital adjustment data from the integrated evaluation and test module to the at least one component of the receiver chain to adjust at least one parameter of the at least one component so as to modify the radio frequency signal to reduce the error signal.

7. The method of claim 6 , wherein processing the digitized version of the radio frequency signal includes performing a Fourier transform on the digitized version of the radio frequency signal to provide the digital output signal comprising frequency domain information about the radio frequency signal.

8. The method of claim 6 , wherein generating the digital reference signal Includes generating a digital reference signal containing frequency domain information corresponding to desired characteristics of the radio frequency signal.

9. The method of claim 8 , wherein comparing the digital output signal with the digital reference signal includes comparing the frequency domain information from the digital output signal with the frequency domain information contained in the digital reference signal, and wherein generating the error signal includes generating an error signal that contains information about frequency domain variations between the digital output signal and the digital reference signal.

10. The method of claim 6 , wherein the receiver chain is part of a radio transceiver that also comprises a transmitter chain, the method further comprising:

generating a transmit radio frequency signal with the transmitter chain; and

processing the transmit radio frequency signal with the receiver chain to generate the radio frequency signal.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2026
From: INTELLECTUAL VENTURES ASSETS 202 LLC
To: E2E SYSTEMS LLC
Reel/Frame 075531/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2026
From: GULA CONSULTING LIMITED LIABILITY COMPANY
To: INTELLECTUAL VENTURES ASSETS 202 LLC
Reel/Frame 075480/0685 →
MERGER Recorded Jan 20, 2016
From: TRIDEV RESEARCH LLC
To: GULA CONSULTING LIMITED LIABILITY COMPANY
Reel/Frame 037538/0760 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED ON REEL 026906 FRAME 0531. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR NAME OF BITWAVE SEMICONDUCTOR, INCORPORATED.. Recorded Sep 19, 2011
From: BITWAVE SEMICONDUCTOR, INCORPORATED
To: TRIDEV RESEARCH LLC
Reel/Frame 026930/0622 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2011
From: BITWAVE SEMICONDUCTOR
To: TRIDEV RESEARCH LLC
Reel/Frame 026906/0531 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2006
From: CYR, RUSSELL J.; DAWE, GEOFFREY C.
To: BITWAVE SEMICONDUCTOR, INC.
Reel/Frame 018265/0403 →
Continuity (2)
Provisional Application 6054341800 · Feb 10, 2004
Related Publication 20050227627A1 · Oct 13, 2005