Methods for forming a semiconductor structure
View Patent ↗Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface, implanting atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer, and bonding the free surface of the second layer to a host wafer. The method also includes supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer, conducting a bond strengthening step on the structure after detachment at a temperature of less than about 800° C. to improve the strength of the bond between the second layer and the host wafer, and selectively etching the first layer portion to remove it from the structure and to expose a surface of the second layer. The implanting step includes implantation parameters chosen to minimize surface roughness resulting from detachment at the zone of weakness.
1. A method for forming a semiconductor structure, which comprises:
providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface;
implanting atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer, wherein the implanting includes implantation parameters chosen to minimize surface roughness resulting from detachment at the zone of weakness by providing a surface roughness relative to the second layer immediately after detachment that is less than about 40 Å RMS measured on a 10×10 μm portion of the surface;
bonding the free surface of the second layer to a host wafer;
supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer;
conducting a bond strengthening step on the structure after detachment at a temperature of less than 800° C. to improve the strength of the bond between the second layer and the host wafer to reduce or avoid edge delamination; and
selectively etching the first layer portion to remove it from the structure and to expose a surface of the second layer.
2. The method of claim 1 , wherein the bond strengthening step is conducted to provide a bonding energy that is greater than or equal to about 0.8 J/m 2 .
3. The method of claim 1 , wherein the bond strengthening step comprises conducting plasma activation on the free surface of the second layer, the host wafer or both prior to bonding.
4. The method of claim 1 , wherein the bond strengthening step comprises conducting a heat treatment on the detached structure.
5. The method of claim 4 , wherein the bond strengthening heat treatment is carried out at a temperature of above about 550° C. but less than 800° C. for between about 30 minutes and about 4 hours.
6. The method of claim 4 , wherein the supplying energy comprises heating the structure in a furnace to a temperature that causes detachment, and the bond strengthening heat treatment is conducted after detachment occurs and without removing the structure from the furnace.
7. The method of claim 6 , wherein the bond strengthening heat treatment comprises a single temperature change from the detachment temperature to a second temperature that is selected for the bond strengthening heat treatment.
8. The method of claim 6 , wherein energy supplied to detach the structure from the donor wafer comprises heating the structure at a temperature of about 500° C. for a time of about 30 minutes to about 2 hours.
9. The method of claim 1 , which further comprises conducting a heat treatment after the bond strengthening step to further strengthen the bond.
10. The method of claim 9 , wherein the further bond strengthening heat treatment is conducted at a temperature of above about 350° C. but less than 800° C. for between about 30 minutes and about 4 hours.
11. The method of claim 1 , wherein the implanting of the atomic species includes co-implanting two atomic elements.
12. The method of claim 11 , wherein the atomic elements are helium and hydrogen.
13. The method of claim 12 , wherein the helium is implanted at a dose of about 0.9×10 16 /cm 2 and hydrogen is implanted at a dose of about 1.0×10 16 /cm 2 .
14. The method of claim 1 , which further comprises, after selectively etching, growing a layer of the second material on the second layer to increase its thickness.
15. The method of claim 1 , which further comprises, prior to bonding, forming a bonding layer comprising an electrically insulating material on the second layer, the host wafer, or both.
16. The method of claim 15 , wherein the electrically insulating material is at least one of SiO 2 , Si 3 N 4 or Si x O y N z .
17. The method of claim 1 wherein the first and second layers have different etching properties with one of the layers being more sensitive to etching than the other one.
18. A method for forming a semiconductor structure, which comprises:
providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface;
implanting atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer, wherein the implanting includes implantation parameters chosen to minimize surface roughness resulting from detachment at the zone of weakness;
bonding the free surface of the second layer to a host wafer;
supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer;
conducting a bond strengthening step on the structure after detachment at a temperature of less than 800° C. to improve the strength of the bond between the second layer and the host wafer; and
selectively etching the first layer portion to remove it from the structure and to expose a surface of the second layer wherein:
(a) the first layer is made of Si 1−x Ge x where 0<x≦1 and the second layer is made of elastically strained Si that is provided at a thickness that is greater than a critical equilibrium thickness;
(b) the donor wafer comprises a support substrate made of solid Si, a buffer structure made of SiGe, a first layer comprising Si 1×x Ge x (x≠0), and a second layer made of strained Si, or
(c) the first layer is made of elastically strained SiGe, and the second layer is made of Si 1−x Ge x where 0<x≦1.
19. The method of claim 18 , wherein the first layer is made of elastically strained Si, and the second layer is made of Si 1−x Ge x where 0<x≦1 and the donor wafer comprises a third layer made of Si 1−x Ge x located under the first layer.
20. The method of claim 19 , wherein implanting occurs under the first layer, and which further comprises selectively etching a portion of the third layer to the level of the first layer after the detachment step.
21. The method of claim 18 , wherein the donor wafer comprises a support substrate made of solid Si, a buffer structure made of SiGe, and a multi-layer structure alternately comprising first layers made of Si 1−x Ge x (x≠0) and second layers made of strained Si, to permit several layer transfers from the same donor wafer, wherein each strained Si layer is provided at a thickness that is greater than a critical equilibrium thickness.
22. The method of claim 21 , which further comprises, prior to implanting, forming the strained layer at a deposit temperature of between about 450° C. and about 650° C. and wherein the treatments used between the deposit and the detachment steps are conducted at temperatures less than or equal to the deposit temperature.