Method for manufacturing integrated circuits and corresponding device

1 . A method of manufacturing integrated circuits comprising the following steps:

conditioning of a depositing chamber;

introducing of at least a substrate in said depositing chamber;

depositing of a compound that does not contain oxygen on said substrate(s);

removing of said substrate(s) from said depositing chamber;

cleaning of said chamber with a cleaning plasma; and

wherein said conditioning step implements a depositing of a conditioning compound, containing at least one oxygen atom, so that said compound react with at least one internal wall of said chamber in order to create a protective layer on the latter, said protective layer allowing to avoid the formation of a parasite deposit in the chamber.

2 . The method set forth in claim 1 , wherein at least one of the walls of the depositing chamber comprise aluminium and/or an aluminium alloy.

3 . The method set forth in claim 1 , wherein said cleaning plasma comprises a fluorinated compound.

4 . The method set forth in claim 3 , wherein said fluorinated compound is tetrafluoromethane.

5 . The method set forth in claim 1 , wherein at least one of said substrates is a plate of a compound chosen from among Si, Ge, GaAs and InP.

6 . The method set forth in claim 1 , wherein said conditioning compound is silicon dioxide.

7 . The method set forth in claim 6 , wherein said silicon dioxide is made from a mix of silane and dinitrogen oxide or oxygen.

8 . The method set forth in claim 7 , wherein said mix is made from a flow of silane with a flow rate of 110 sccm and a flow of dinitrogen oxide with a flow rate of 2000 sccm.

9 . The method set forth in claim 7 , wherein said gas mix further comprises nitrogen.

10 . The method set forth in claim 1 , wherein during the conditioning step, said chamber is subjected to a 400 W electric field.

11 . The method set forth in claim 1 , wherein the conditioning step is performed with a depositing pressure of 330 mT.

12 . The method set forth in claim 1 , wherein said conditioning step last for practically 10 s.

13 . The method set forth in claim 1 , wherein said compound deposited on said substrate(s) is the silicon nitride.

14 . Device for manufacturing integrated circuits comprising:

a depositing chamber provided to receive at least one substrate;

means for conditioning said depositing chamber;

means for depositing at least one layer of a compound that does not contain oxygen on said substrate;

means for cleaning said depositing chamber using a cleaning plasma once said substrate has been removed; and

at least one means of routing in said depositing chamber of a conditioning compound containing at least one oxygen atom, so that said compound react with at least one internal wall of said chamber in order to create a protective layer on the latter, said protective layer allowing to avoid the formation of a parasite deposit in the chamber.