Content addressable memory organized to share entries between different entities such as ports of a network unit
View Patent ↗A content addressable memory stores entries each comprising a rule and as part of the entry a mask identifying all the entities to which the rule is applicable. A search pattern of data and a bit mask identifying the actual entity (or entities) associated with the data is applied as a search word along with a comparison mask that excludes all the other entities from the comparison of the search word with the entry. The CAM can thereby store efficiently in a single entry a rule that may be applicable to some but not all of a multiplicity of entities such as possible ingress ports of a network unit.
1. A method of operating a content addressable memory in the examination of a selected portion of a packet for conformity with at least one rule, comprising:
(a) storing the rule in a first segment of a data line of the content addressable memory;
(b) storing in a second segment of said data line a port bit mask identifying to which network unit ports said one rule is applicable;
(c) identifying at least one particular port; and
(d1) applying to the content addressable memory a word which comprises said selected portion in respect of said first segment; and in respect of said second segment a search bit pattern that selects said at least one port and masks other ports; and
(d2) applying to said content addressable memory a comparison mask which excludes all said other ports from a comparison of the word with the contents of the content addressable memory.
2. A method as in claim 1 wherein said search bit pattern specifies a single port and said comparison mask excludes all ports other than said single port from said comparison.
3. A method as in claim 1 wherein said selected portion of a packet comprises selected bits of a data packet.
4. A rules engine for the examination of a selected portion of a packet for conformity with at least one rule, the rules engine comprising:
(a) a content addressable memory organized for storing the rule in a first segment of a data line of the content addressable memory and for storing a bit pattern in a second segment of said data line, said bit pattern specifying all network unit ports to which said rule is applicable; and
logic organized:
(i) to identify at least one particular entity port;
(ii) to apply to the content addressable memory a word which comprises said selected portion in respect of said first segment; and in respect of said second segment a search bit pattern that selects said at least one port and masks other ports; and
(iii) to apply to said content addressable memory a comparison mask which excludes all said other ports from a comparison of the word with the contents of the content addressable memory.
5. A rules engine as in claim 4 wherein said search bit pattern specifies a single port and said comparison mask excludes all ports other than said single port from said comparison.
6. A network unit comprising:
a multiplicity of ports for receiving and forwarding data packets; and
a rules engine for the examination of a selected portion of a data packet in said network unit for conformity with at least one rule, the rules engine comprising:
a) a content addressable memory organized for storing the rule in a first segment of a data line of the content addressable memory and for storing a port bit mask in a second segment of said data line, said port bit mask specifying all the ports to which said rule is applicable; and
logic responsive to said data packet and organized:
(i) to identify at least one particular port for the packet;
(ii) to apply to the content addressable memory a word which comprises said selected portion in respect of said first segment; and in respect of said second segment a search bit pattern that selects at least one port and masks other ports; and
(iii) to apply to said content addressable memory a comparison mask which excludes all said other ports from a comparison of the word with the contents of the content addressable memory.
7. A rules engine for the examination of a selected portion of a data packet received by a network unit, which has a multiplicity of ports, for conformity with at least one rule, the rules engine comprising:
(a) a content addressable memory organized for storing the rule in a first segment of a data line of the content addressable memory and for storing a port bit pattern in a second segment of said data line, said port bit pattern specifying all the ports to which said rule is applicable; and
logic responsive to a packet and organized:
(i) to identify at least one particular port for the packet;
(ii) to apply to the content addressable memory a word which comprises said selected portion in respect of said first segment; and in respect of said second segment a search bit pattern that selects at least one port and masks other ports; and
(iii) to apply to said content addressable memory a comparison mask which excludes all said other ports from a comparison of the word with the contents of the content addressable memory.
8. A rules engine as in claim 7 wherein said search bit pattern specifies a single ingress port and said comparison mask excludes all ports other than said single ingress port from said comparison.
9. A network unit comprising:
a multiplicity of ports for receiving and forwarding data packets; and
a rules engine for the examination of a selected portion of a data packet received by a said network unit for conformity with at least one rule, the rules engine comprising:
(a) a content addressable memory organized for storing the rule in a first segment of a data line of the content addressable memory and for storing a port bit mask in a second segment of said data line, said port bit mask specifying all the ports to which said rule is applicable; and
logic responsive to a packet and organized:
(i) to identify at least one particular port for the packet;
(ii) to apply to the content addressable memory a word which comprises said selected portion in respect of said first segment; and in respect of said second segment a search bit pattern that selects at least one port and masks other ports; and
(iii) to apply to said content addressable memory a comparison mask which excludes all said other ports from a comparison of the word with the contents of the content addressable memory.
10. A network unit as in claim 9 wherein said search bit pattern specifies a single ingress port and said comparison mask excludes all ports other than said single ingress port from said comparison.