IP Library Patent Application 11068520
Patent Application
App. No. 11/068,520

Ceramic components, coated structures and methods for making same

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Quick Facts
Patent No.
US None
App. No.
11/068,520
Filed
Feb 28, 2005
Examiner
CHEN, BRET P
Art Unit
1715
USPC
427/248.1
Abstract

Methods of forming ceramic components are disclosed. One method calls for chemical vapor depositing a ceramic material over a substrate having first and second opposite surfaces to define a coated structure, the ceramic material forming a layer overlying both the first and second opposite surfaces. The layer and the substrate have a difference in thermal expansion coefficients of at least 0.5 ppm/K. The substrate is removed, leaving behind the layer. Ceramic components and coated structures are also disclosed.

Claims (46)

1 . A method of forming a ceramic component, comprising:

providing a substrate first and second opposite major surfaces, wherein the first and second major surfaces are substantially parallel to each other and are separated by a thickness of the substrate;

forming a first pattern within the substrate, wherein the first pattern extends form the first opposite major surface;

chemical vapor depositing a ceramic material over a substrate to define a coated structure, the ceramic material forming a layer along each of the first and second opposite major surfaces and within the first pattern, the layer and the substrate having a difference in thermal expansion coefficients of at least 0.5 ppm/K; and

removing the substrate leaving behind the layer.

2 . The method of claim 1 , wherein the substrate is a wafer.

3 . The method of claim 1 , wherein the first pattern extends partly but not completely to the second opposite major surface of the substrate.

4 . The method of claim 3 , further comprising forming a second pattern extending along the second opposite major surface.

5 . The method of claim 3 , wherein the pattern comprises microfeatures.

6 . The method of claim 5 , wherein the microfeatures have a critical dimension not greater than about 500 microns.

7 . The method of claim 6 , wherein the critical dimension is not greater than about 200 microns.

8 - 13 . (canceled)

14 . The method of claim 1 , wherein the difference in thermal expansion coefficients is not less than 0.75 ppm/K.

15 - 42 . (canceled)

43 . A method of forming a ceramic component, comprising:

depositing a polycrystalline ceramic material over a substrate to form a layer overlying the substrate, wherein depositing comprises (i) chemical vapor depositing a first film comprised of the polycrystalline ceramic material; (ii) cooling the substrate and the first film; and (iii) chemical vapor depositing a second film comprised of the polycrystalline ceramic material to overlie the first film, wherein the layer comprises the first and second films, and the layer and the substrate have a difference in thermal expansion coefficients of at least 0.5 ppm/K; and

removing the substrate leaving behind the layer.

44 - 46 . (canceled)

47 . The method of claim 45 , wherein the pattern comprises microfeatures.

48 . The method of claim 47 , wherein the microfeatures have a critical dimension not greater than about 200 microns.

49 - 50 . (canceled)

51 . The method of claim 47 , further comprising processing the deposited ceramic material to form a plurality of ceramic components.

52 . The method of claim 51 , wherein the microfeatures comprise a pattern of microfeature groups, each microfeature group defining a complementary microfeature group in the layer, each complementary microfeature group defining an individual ceramic component of the plurality of ceramic components.

53 . The method of claim 51 , wherein the plurality of ceramic components comprise a plurality of MEMS or MMS ceramic components.

54 - 57 . (canceled)

58 . The method of claim 43 , wherein the polycrystalline ceramic material comprises SiC.

59 . (canceled)

60 . The method of claim 43 , wherein the substrate comprises silicon.

61 . The method of claim 60 , wherein the substrate consists essentially of silicon.

62 . (canceled)

63 . The method of claim 43 , wherein the layer has a thickness not less than 50 microns.

64 - 68 . (canceled)

69 . The method of claim 43 , wherein the first film is deposited at a first deposition rate r 1 and the second film is deposited at a second deposition rate r 2 , wherein r 2 >2r 1 .

70 . (canceled)

71 . The method of claim 43 , wherein the first and second films are deposited at a temperature not less than 800° C. and not greater than 1300° C.

72 . The method of claim 43 , wherein cooling is carried out at a temperature not greater than 400° C.

73 - 74 . (canceled)

75 . The method of claim 43 , wherein the film is deposited to a thickness t 1 and the second film is deposited to a thickness t 2 , wherein t 2 >2t 1 .

76 - 115 . (canceled)

116 . A method of depositing a silicon carbide layer, comprising:

depositing a first polycrystalline silicon carbide film over a patterned silicon substrate by chemical vapor deposition at a temperature not less than 800° C. and at a rate r 1 , the first polycrystalline silicon carbide film having a thickness t 1 ;

cooling the substrate and the first film to a temperature not greater than 400° C. after depositing the first silicon carbide film; and

depositing a second polycrystalline silicon carbide film over the first polycrystalline silicon carbide film by chemical vapor deposition at a temperature not less than 800° C. and at a rate r 2 , the second polycrystalline silicon carbide film having a thickness t 2 ;

wherein t 2 >2t 1 , r 2 >2r 1 , and the silicon carbide layer is comprised of the first and second polycrystalline silicon carbide films, the silicon carbide layer having a thickness not less than 30 microns.

117 - 119 . (canceled)

120 . The method of claim 116 , wherein each of depositing a first polycrystalline silicon carbide film and depositing a first polycrystalline silicon carbide film is performed at a temperature not greater than 1300° C.

Assignments (3)
RELEASE OF INTELLECTUAL PROPERTY SECURITY INTEREST Recorded Jul 22, 2025
From: HERCULES CAPITAL, INC., AS COLLATERAL AGENT
To: VOYAGER TECHNOLOGIES, INC. (F/K/A VOYAGER SPACE HOLDINGS, INC.); NANORACKS LLC; VOYAGER SPACE IP HOLDINGS, LLC; VALLEY TECH SYSTEMS, INC.; DREAMUP, PBC; PIONEER INVENTION, LLC; SPACE MICRO INC.; ALTIUS SPACE MACHINES, INC.; ZIN TECHNOLOGIES, INC.
Reel/Frame 072129/0689 →
SECURITY INTEREST Recorded Jul 1, 2024
From: VOYAGER SPACE HOLDINGS, INC.; VOYAGER SPACE IP HOLDINGS, LLC; DREAMUP, PBC; SPACE MICRO INC.; ZIN TECHNOLOGIES, INC.; NANORACKS LLC; VALLEY TECH SYSTEMS, INC.; PIONEER INVENTION, LLC; ALTIUS SPACE MACHINES, INC.
To: HERCULES CAPITAL, INC., AS AGENT
Reel/Frame 068104/0818 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2005
From: IZADNEGAHDAR, ALAIN; NARENDAR, YESHWANTH
To: SAINT-GOBAN CERAMICS & PLASTICS, INC.; ZIN TECHNOLOGIES, INC.
Reel/Frame 016404/0385 →