IP Library Granted Patent US 7,120,193
Granted Patent B2
US 7,120,193 · App. 11/070,485 · Granted Oct 10, 2006

Decision feedback equalizer with dynamic feedback control

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Quick Facts
Patent No.
US 7,120,193
App. No.
11/070,485
Granted
Oct 10, 2006
Kind
B2
Abstract

A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer.

Claims (33)

1. An apparatus including a decision feedback equalizer with dynamic feedback control for adaptively controlling a pre-slicer data signal that is sliced to provide a post-slicer data signal, comprising:

first signal combining circuitry that combines at least first and second feedback signals with an input signal representing a plurality of data to provide a pre-slicer signal;

signal slicing circuitry, coupled to said first signal combining circuitry, that slices said pre-slicer signal to provide a post-slicer signal indicative of said plurality of data;

first decision feedback circuitry, coupled to said signal slicing circuitry, that processes said post-slicer signal in response to at least one adaptation control signal to provide said first feedback signal;

second decision feedback circuitry, coupled to said signal slicing circuitry, that delays and processes said post-slicer signal in response to a plurality of adaptation control signals to provide a delayed post-slicer signal and said second feedback signal; and

adaptation control circuitry, coupled to said first and second decision feedback circuitries, that further delays and processes said delayed post-slicer signal in response to a difference signal indicative of a difference between said pre-slicer and post-slicer signals to provide said at least one and plurality of adaptation control signals, and includes

tapped delay circuitry that further delays said delayed post-slicer signal to provide a plurality of successively further delayed post-slicer signals, and

second signal combining circuitry, coupled to said tapped delay circuitry, that combines said plurality of successively further delayed post-slicer signals and said difference signal to provide said at least one and plurality of adaptation control signals, and includes

signal multiplication circuitry that multiplies said plurality of successively further delayed post-slicer signals and said difference signal to provide a plurality of resultant signals; and

signal integration circuitry, coupled to said signal multiplication circuitry, that integrates respective ones of said plurality of resultant signals to provide said at least one and plurality of adaptation control signals.

2. The apparatus of claim 1 , wherein said signal integration circuitry comprises lowpass filter circuitry that filters respective ones of said plurality of resultant signals to provide said at least one and plurality of adaptation control signals.

3. An apparatus including a decision feedback equalizer with dynamic feedback control for adaptively controlling a pre-slicer data signal that is sliced to provide a post-slicer data signal, comprising:

first signal combining circuitry that combines at least first and second feedback signals with an input signal representing a plurality of data to provide a pre-slicer signal;

signal slicing circuitry, coupled to said first signal combining circuitry, that slices said pre-slicer signal to provide a post-slicer signal indicative of said plurality of data;

first decision feedback circuitry, coupled to said signal slicing circuitry, that processes said post-slicer signal in response to at least one adaptation control signal to provide said first feedback signal;

second decision feedback circuitry, coupled to said signal slicing circuitry, that delays and processes said post-slicer signal in response to a plurality of adaptation control signals to provide a delayed post-slicer signal and said second feedback signal; and

adaptation control circuitry, coupled to said first and second decision feedback circuitries, that further delays and processes said delayed post-slicer signal in response to a difference signal indicative of a difference between said pre-slicer and post-slicer signals to provide said at least one and plurality of adaptation control signals, and includes

adaptive timing control circuitry that selectively delays said delayed post-slicer signal in response to a plurality of adaptive timing control signals to provide an adaptively delayed post-slicer signal,

tapped delay circuitry, coupled to said adaptive tuning control circuitry, that further delays said adaptively delayed post-slicer signal to provide a plurality of successively further delayed post-slicer signals, and

second signal combining circuitry, coupled to said tapped delay circuitry, that combines said plurality of successively further delayed post-slicer signals and said difference signal to provide said at least one and plurality of adaptation control signals.

4. The apparatus of claim 3 , wherein said second signal combining circuitry comprises:

signal multiplication circuitry that multiplies said plurality of successively further delayed post-slicer signals and said difference signal to provide a plurality of resultant signals; and

signal integration circuitry, coupled to said signal multiplication circuitry, that integrates respective ones of said plurality of resultant signals to provide said at least one and plurality of adaptation control signals.

5. The apparatus of claim 4 , wherein said signal integration circuitry comprises lowpass filter circuitry that filters respective ones of said plurality of resultant signals to provide said at least one and plurality of adaptation control signals.

6. A method for adaptively controlling a pre-slicer data signal that is sliced to provide a post-slicer data signal, comprising:

combining at least first and second feedback signals with an input signal representing a plurality of data to produce a pre-slicer signal;

slicing said pre-slicer signal to produce a post-slicer signal indicative of said plurality of data;

processing said post-slicer signal in response to at least one adaptation control signal to produce said first feedback signal;

delaying and processing said post-slicer signal in response to a plurality of adaptation control signals to produce a delayed post-slicer signal and said second feedback signal; and

delaying and processing said delayed post-slicer signal in response to a difference signal indicative of a difference between said pre-slicer and post-slicer signals to produce said at least one and plurality of adaptation control signals by

selectively delaying said delayed post-slicer signal in response to a plurality of adaptive timing control signals to produce an adaptively delayed post-slicer signal,

further delaying said adaptively delayed post-slicer signal to produce a plurality of successively further delayed post-slicer signals, and

combining said plurality of successively further delayed post-slicer signals and said difference signal to produce said at least one and plurality of adaptation control signals.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →