Systems and methods for overcoming part to part skew in a substrate-mounted circuit

1. A system for compensating for signal skew in a substrate mounted circuit, comprising:

a programmable delay buffer; and

a computer in communication with the programmable delay buffer, the programmable delay buffer receiving a component signal from a first component, the component signal having skew;

wherein the programmable delay buffer applies a first delay to the component signal resulting in a first delayed signal;

wherein the computer determines if the first delay compensates for the skew in the component signal by comparing the first delayed signal with a reference signal after the component signal is first received by the system;

wherein after the computer determines if the first delay compensates for the skew, the programmable delay buffer applies a second delay to the first delayed signal, resulting in a second delayed signal;

wherein after the programmable delay buffer applies the second delay, the computer indicates to the programmable delay buffer that the second delay compensates for the skew in the signal;

wherein the computer saves the first delay and the second delay to a pass list;

wherein the computer determines from the pass list at least two delay values that compensated for the skew in the signal;

wherein the computer determines a mid-point of the at least two delay values; and,

wherein the computer uses the mid-point to delay the signal;

wherein the programmable delay buffer is programmed prior to the use of the substrate mounted circuit.

2. The system of claim 1 , further comprising: a sensor comprising the reference signal, wherein the sensor communicates the reference signal to the computer.

3. The system of claim 1 , further comprising: a synchronous buffer connected to the programmable delay buffer for synchronizing the second delayed signal with a second signal resulting in a synchronized signal and sending the synchronized signal to a second component.

4. The system of claim 3 , wherein the computer determines if the applied first delay compensates for the skew by determining a time period during which a bus associated with the second component is operational.

5. The system of claim 4 , wherein determining a time period during which the bus is operational comprises prompting the second component to perform a read or write operation.

6. The system of claim 4 , further comprising: a switch control for controlling signal paths to the programmable delay buffer.

7. The system of claim 1 , wherein the first component is a signal copier for copying the component signal.

8. The system of claim 7 , wherein the signal copier sends a copy of the component signal to the second component.

9. A method for compensating for signal skew in a substrate-mounted circuit, comprising:

receiving an initial signal from a first component, wherein the signal comprises skew produced by the first component;

delaying the initial signal resulting in a first delayed signal;

comparing the first delayed signal to a reference signal after the initial signal is received;

delaying the first delayed signal resulting in a second delayed signal;

comparing the second delayed signal to the reference signal;

sending the second delayed signal to a second component;

determining that delaying the first delayed signal compensated for the skew, the determining comprising:

setting a tune value in the second delayed signal;

testing the tune value at the bus;

saving the tune value to a pass list if the tune value passes the test, wherein the tune value passes the test if the bus is operational;

determining from the pass list a cluster of tune values that passed the test;

determining a mid-point of the cluster; and,

using the mid-point to delay the signal

wherein determining that delaying the first signal compensated for the skew comprises determining a time period during which a bus associated with the second component is operational.

10. The method of claim 9 , wherein the reference signal is a system clock.

11. The method of claim 9 , further comprising:

synchronizing an input signal with the second delayed signal resulting in a synchronized input signal; and

sending the synchronized input signal to the second component.

12. A computer-readable medium having computer-executable instructions stored thereon for performing steps, comprising

receiving an initial signal from a first component, wherein the initial signal comprises skew produced by the first component;

delaying the initial signal resulting in a first delayed signal;

comparing the first delayed signal to a reference signal after the initial signal is received;

delaying the first delayed signal resulting in a second delayed signal;

comparing the second delayed signal to the reference signal; and

sending the second delayed signal to a second component;

determining that delaying the first delayed signal compensated for the skew;

sending the second delayed signal to a second component;

determining a time period during which a bus associated with the second component is operational;

setting a tune value in the second delayed signal;

testing the tune value at the bus;

saving the tune value to a pass list if the tune value passes the test, wherein the tune value passes the test if the bus is operational;

synchronizing an input signal with the second delayed signal resulting in a synchronized input signal; and

sending the synchronized input signal to the second component.

13. The computer-executable instructions of claim 12 wherein the reference signal is a system clock.

14. The computer-executable instructions of claim 12 further comprising:

synchronizing an input signal with the second delayed signal resulting in a synchronized input signal; and

sending the synchronized input signal to the second component.