Electroluminescent devices and displays with integrally fabricated address and logic devices fabricated by printing or weaving
View Patent ↗Improved electroluminescent and photonic devices with integrated logic and control circuits are disclosed. Low mobility, contact barrier, space charge limitation and carrier balancing are provided solutions that increase efficiency, reliability and longevity of the devices. Device power loss and power requirements are reduced. True-ohmic contact materials allow a gate-controlled, light emitting organic triode MESFET configuration that eliminates commonly used ITO thereby increasing luminous output, and providing ease of address and control by integrally fabricated complementary MESFET address and control circuitry. The devices can be fabricated by printing or by weaving appropriate materials, and can be configured as color displays.
1. A method for fabricating an EL device, said method comprising:
storing one or more constituent materials of the EL device in a solution form, wherein the constituent materials comprise a true-ohmic contact metal; and
printing the constituent materials in patterns and in a sequence on a substrate to form at least a portion of the EL device, wherein the printing is done in a substantially oxygen free environment.
2. The method of claim 1 , wherein the printing is implemented with an ink jet that moves along a predefined path that goes back and forth across a predetermined area.
3. The method of claim 1 , further comprising encapsulating the EL device after printing the constituent materials to protect the constituent materials from oxidation.
4. The method of claim 1 , further comprising applying a protective coating to the constituent materials after printing to prevent oxidation.
5. A method to fabricate an EL display with integrally fabricated logic devices, said method comprising:
depositing solution forms of at least EL semiconductor materials, ohmic contact metals, and gate conductor materials in a first pattern and sequence on a transparent substrate to form EL pixel elements configured for emitting light; and
depositing solution forms of at least p-type semiconductor materials, n-type semiconductor materials, ohmic contact metals, and gate conductor materials in a second pattern and sequence on top of the EL pixel elements to form complementary logic devices with respective outputs that control the EL pixel elements.
6. The method of claim 5 , wherein each of the EL pixel elements has an OMESFET structure comprising a strip of EL semiconductor material, a first true-ohmic contact metal contacting the strip of EL semiconductor material at one end to define a source terminal, a second true-ohmic contact metal contacting the strip at EL semiconductor material at another end to define a drain terminal, and a surround gate or a surface gate contacting the strip of EL semiconductor material between the source terminal and the drain terminal to define a gate terminal.
7. The method of claim 6 , wherein the gate terminal, the source terminal, or the drain terminal the EL pixel element is connected to the output of the complementary logic device above the EL pixel element.
8. The method of claim 5 , further comprising encapsulating the EL pixel elements and the complementary logic devices after solution deposition to prevent oxidation.
9. The method of claim 6 , wherein the surround gate or the surface gate is positioned approximately midway between the source terminal and the drain terminal.
10. The method of claim 6 , wherein the surround gate or the surface gate is separated from the source terminal or the drain terminal by no more than about 3000 nanometers.
11. The method of claim 6 , wherein the surround gate or the surface gate is positioned closer to either the source terminal or the drain terminal.
12. The method of claim 5 , wherein the EL semiconductor materials comprise an n-type metal-organic semiconductor.
13. The method of claim 5 , wherein the ohmic contact metals comprise CuCa 2 or Al 2 Li 3 .
14. The method of claim 5 , wherein the gate conductor materials comprise gold.
15. The method of claim 5 , wherein the gate conductor materials have a relatively high work function with respect to the EL semiconductor materials.
16. The method of claim 5 , wherein the solutions are deposited by stamping or by printing techniques of an ink-jet system.
17. The method of claim 5 , wherein the solutions are deposited in a substantially oxygen free environment.
18. The method of claim 1 , wherein the constituent materials further comprise an EL material and a gate conductor material printed on the substrate such that the EL material has a first surface that contacts the substrate and a second surface that contacts the true-ohmic contact metal and the gate conductor material.
19. The method of claim 18 , wherein the EL material comprises an n-type metal-organic semiconductor.
20. The method of claim 18 , wherein the gate conductor material comprises gold.
21. The method of claim 18 , wherein a strip of gate conductor material is printed between two strips of true-ohmic contact metal on top of the EL material to form an OMESFET structure.
22. The method of claim 21 , wherein the gate conductor material is separated from the strips of true-ohmic contact metal by no more than 3000 nanometers.
23. The method of claim 1 , wherein the true-ohmic contact metal comprises CuCa 2 or Al 2 Li 3 .
24. The method of claim 1 , wherein the substrate is an optically transparent material.
25. The method of claim 1 , wherein the EL device is configured as a video display.
26. The method of claim 1 , wherein the constituent materials are stored in a plurality of reservoirs and an ink jet system prints the constituent materials on the substrate.