IP Library Granted Patent US 7,657,186
Granted Patent B2
US 7,657,186 · App. 11/073,886 · Granted Feb 2, 2010

Consistency checking over internal information in an optical transceiver

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Quick Facts
Patent No.
US 7,657,186
App. No.
11/073,886
Granted
Feb 2, 2010
Kind
B2
Abstract

A method that enables an optical transceiver to perform consistency checking, such as Cyclic Redundancy Checking (CRC), over internal information stored in the transceiver's memory while the transceiver is in operation. The optical transceiver includes a system memory and a consistency checker component. The consistency checker component determines that consistency checking is to be performed and identifies which portion of the system memory is to be checked. The consistency checker reads the portion of system memory and determines whether or not the portion of system memory is consistent with an expected consistency check value.

Claims (48)

1. In an optical transceiver system including system memory and a consistency checker component, the system memory including a plurality of consistency check portions that are to be subjected to consistency checking and plurality of non-consistency check portions that are not to be subjected to consistency checking, wherein the plurality of non-consistency check portions are interleaved between the plurality of consistency check portions, a method for the consistency checker component to check portions of system memory for consistency, the method comprising:

during operation of an optical transceiver system, performing:

an act of determining that consistency checking is to be performed on one or more consistency check portions of the system memory;

an act of the consistency checker component reading at least one of the one or more consistency check portions of the system memory that are to be subjected to consistency checking; and

an act of the consistency checker component determining whether or not the data from the at least one of the one or more consistency check portions of system memory is consistent with an expected consistency check value.

2. A method in accordance with claim 1 , wherein the system memory further has thereon a memory-check table, and the act of determining that consistency checking is to be performed on one or more consistency check portions of the system memory further comprises:

an act of reading a first entry in the memory-check table, the first entry identifying a first consistency check portion of the system memory; and

an act of reading a second entry in the memory-check table, the second entry identifying a second consistency check portion of the system memory.

3. A method in accordance with claim 1 , wherein the system memory further has thereon a memory-check table, further comprising:

an act of populating entries of the memory-check table with data defining a consistency check portion of system memory identified by the entries while leaving one or more entries of the memory-check table temporarily unpopulated;

an act of later populating at least one of the one or more temporarily unpopulated entries of the memory-check table with data defining other consistency check portions of the system memory; and

an act of generating a new consistency check value in response to populating the at least one or more temporarily unpopulated entries.

4. A method in accordance with claim 1 , wherein the system memory further has thereon a memory-check table, the optical transceiver further includes a processor, the method further comprising:

an act of configuring the memory-check table to contain data defining the location of consistency check portions of the system memory, wherein a consistency check value is associated with one or more of the consistency check portions of the system memory such that when the data from the one or more consistency check portions of the system memory is provided as input to a many to one deterministic function, the consistency check value should result;

an act of the processor changing a value of at least one of the one or more consistency check portions;

an act of the processor turning off the consistency checker component in response to the act the processor changing the value of the consistency check portion;

an act of the processor altering the consistency check value to account for the changed value of the at least one of the one or more consistency check portions; and

an act of turning on the consistency checker component subsequent to the act of the processor altering the consistency check value.

5. A method in accordance with claim 1 , further comprising:

an act of the consistency checker component initiating an optical transceiver warm reboot process if the consistency checker determines that the data from the at least one or more consistency check portions of system memory is not consistent with the expected consistency check value.

6. A method in accordance with claim 1 , wherein at least one of the one or more consistency check portions define an operation of an optical transceiver.

7. A method in accordance with claim 1 , wherein the consistency checker component is a state machine.

8. A method in accordance with claim 1 , wherein the consistency checker component is a processor.

9. A method in accordance with claim 1 , wherein a dynamic data area of system memory is bounded on both sides by static data areas of system memory.

10. An optical transceiver comprising:

a system memory, the system memory including a plurality of consistency check portions that are to be subjected to consistency checking and plurality of non-consistency check portions that are not to be subjected to consistency checking, wherein the plurality of non-consistency check portions are interleaved between the plurality of consistency check portions;

a consistency checker component for performing consistency checking on one or more of the consistency check portions of system memory, wherein the consistency checking comprises, during operation of the optical transceiver:

determining that consistency checking is to be performed on one or more consistency check portions of the system memory;

reading at least one of the one or more consistency check portions of the system memory that are to be subjected to consistency checking; and

determining whether or not the data from the at least one of the one or more consistency check portions of system memory is consistent with an expected consistency check value.

11. An optical transceiver in accordance with claim 10 , wherein the system memory further has thereon a memory-check table and the consistency checking further comprises:

reading a first entry in the memory-check table, the first entry identifying a first consistency check portion of the system memory; and

reading a second entry in the memory-check table, the second entry identifying a second consistency check portion of the system memory.

12. An optical transceiver in accordance with claim 10 , wherein the system memory further has thereon a memory-check table and the consistency checking further comprises:

populating entries of the memory-check table with data defining a consistency check portion of system memory identified by the entries while leaving one or more entries of the memory-check table temporarily unpopulated;

later populating at least one of the one or more temporarily unpopulated entries of the memory-check table with data defining other consistency check portions of the system memory; and

generating a new consistency check value in response to populating the at least one or more temporarily unpopulated entries.

13. An optical transceiver in accordance with claim 10 , wherein the system memory further has thereon a memory-check table, and the optical transceiver further includes a processor, the consistency checking further comprising:

configuring the memory-check table to contain data defining the location of consistency check portions of the system memory, wherein a consistency check value is associated with one or more of the consistency check portions of the system memory such that when the data from the one or more consistency check portions of the system memory is provided as input to a many to one deterministic function, the consistency check value should result;

the processor changing a value of at least one of the one or more consistency check portions;

the processor turning off the consistency checker component in response to the act the processor changing the value of the consistency check portion;

the processor altering the consistency check value to account for the changed value of the at least one of the one or more consistency check portions; and

turning on the consistency checker component subsequent to the act of the processor altering the consistency check value.

14. An optical transceiver in accordance with claim 10 , wherein the consistency checker component is configured to initiate an optical transceiver warm reboot process if the consistency checking component determines that the data in the one or more consistency check portions of the system memory is not consistent with an expected consistency check value.

15. An optical transceiver in accordance with claim 10 , wherein the consistency checker component is configured to inform a host computing system coupled to the optical transceiver of the loss of consistency if the consistency checking component determines that the data in the one or more consistency check portions of the system memory is not consistent with an expected consistency check value.

16. An optical transceiver in accordance with claim 10 , wherein at least one of the one or more consistency check portions define an operation of an optical transceiver.

17. An optical transceiver in accordance with claim 10 , wherein the consistency checker component is a state machine.

18. An optical transceiver in accordance claim 10 , a dynamic data area of system memory is bounded on both sides by static data areas of system memory.

Assignments (4)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →