IP Library Granted Patent US 7,199,600
Granted Patent B2
US 7,199,600 · App. 11/078,352 · Granted Apr 3, 2007

Semiconductor device testing method and testing equipment

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Quick Facts
Patent No.
US 7,199,600
App. No.
11/078,352
Granted
Apr 3, 2007
Kind
B2
Abstract

A burn-in testing method to perform tests with a semiconductor device operated in an atmosphere at a prescribed temperature characterized in that operation instruction signals instructing an operation of the semiconductor device are repeatedly supplied while supplying power to the semiconductor device, and increases and decreases in a power supply current corresponding to the operation instruction signals are counted.

Claims (10)

1. A testing method of performing testing of a semiconductor device by causing an operation in an atmosphere at a prescribed temperature, comprising:

repeatedly supplying an operation instruction signal instructing the operation to said semiconductor device while applying a power supply to said semiconductor device; and

counting increases and decreases in the power supply current corresponding to said operation instruction signals.

2. The testing method according to claim 1 , wherein said semiconductor device includes an image sensor which performs an image-capture operation in response to said operation instruction signal while power is being supplied.

3. The testing method according to claim 2 , wherein said operation instruction signal is an image-capture instruction signal.

4. The testing method according to claim 1 , wherein said semiconductor device includes a fingerprint sensor which performs a fingerprint shape recognition operation in response to the operation instruction signal while power is being supplied.

5. The testing method according to claim 4 , wherein said operation instruction signal is a signal specifying a pseudo-operating mode in which a fingerprint shape recognition operation is performed even when no fingerprint is pressed against the device.

6. The testing method according to claim 1 , wherein said semiconductor device enters a standby state without performing an expected operation while power is being supplied, and enters an operating state and executes the expected operation in response to an operation instruction.

7. The testing method according to claim 1 , wherein, when the number of increases and decreases of the power supply current corresponding to said operation instruction signals reaches a first number of times, the device is judged to be non-defective, and when said first number of times is not reached, the device is judged to be defective.

8. The testing method according to claim 7 , wherein supply of said operation instruction signal is repeated until a second number of times, which is greater than said first number of times, is reached.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0469 →