Method and structure for explicit software control using scoreboard status information
A user is provided with means to sample memory hierarchy via software. This allows a user to enhance memory-level parallelism via software. A status of information needed for execution of a second computer program instruction is read in response to execution of a first computer program instruction. Execution continues with execution of the second computer program instruction upon the status being a first status. Alternatively, a third computer program instruction is executed upon the status being a second status different from the first status. Thus, execution of the first computer program instruction allows control of the memory hierarchy, which in turn give the user control of the memory hierarchy.
1. A computer-based method comprising:
reading, from a scoreboard, a status of information needed for execution of a second computer program instruction in a computer source program in execution of a first computer program instruction in said computer source program;
continuing with execution of said second computer program instruction upon said status being a first status; and
continuing, alternatively, with execution of a third computer program instruction of said computer source program upon said status being a second status different from said first status.
2. The computer-based method of claim 1 , wherein said first computer instruction comprises a branch on status instruction.
3. The computer-based method of claim 1 , wherein said first computer instruction comprises a branch on ready instruction.
4. The computer based method of claim 3 wherein said branch on ready instruction comprises a branch on integer register ready instruction.
5. The computer-based method of claim 1 , wherein said first computer instruction comprises a branch on not ready instruction.
6. The computer based method of claim 5 wherein said branch on not ready instruction comprises a branch on integer register not ready instruction.
7. The computer-based method of claim 1 wherein said status is associated with a functional unit.
8. The computer-based method of claim 1 wherein said status is associated with a register.
9. A structure comprising:
means for reading, from a scoreboard, a status of information needed for execution of a second computer program instruction in a computer source program in execution of a first computer program instruction in said computer source program;
means for continuing with execution of said second computer program instruction upon said status being a first status; and
means for continuing, alternatively, with execution of a third computer program instruction of said computer source program upon said status being a second status different from said first status.
10. A computer system comprising:
a processor; and
a memory coupled to the processor and having stored therein instructions wherein execution of the instructions on the processor provides a method comprising:
reading, from a scoreboard, a status of information needed for execution of a second computer program instruction in a computer source program in execution of a first computer program instruction in said computer source program;
continuing with execution of said second computer program instruction upon said status being a first status; and
continuing, alternatively, with execution of a third computer program instruction of said computer source program upon said status being a second status different from said first status.
11. A computer-program product comprising a medium of a common data carrier having stored therein computer readable code for a method comprising:
reading, from a scoreboard, a status of information needed for execution of a second computer program instruction in a computer source program in execution of a first computer program instruction in said computer source program;
continuing with execution of said second computer program instruction upon said status being a first status; and
continuing, alternatively, with execution of a third computer program instruction of said computer source program upon said status being a second status different from said first status.
12. A computer-based method comprising:
exposing a scoreboard of a processor on execution of a branch on status software instruction, on said processor, in a computer source program; and
explicitly controlling by said execution of said branch on status instruction which software instruction of a multiplicity of software instructions in said computer source program is executed, on said processor, after execution of said branch on status software instruction wherein said explicitly controlling reads a status of information in said scoreboard exposed on said execution of said branch on status software instruction to determine whether to branch to a label included in said branch on status instruction.
13. The computer-based of claim 12 , wherein said branch on status software instruction comprises a branch on ready instruction.
14. The computer-based method of claim 12 , wherein said branch on status software instruction comprises a branch on not ready instruction.
15. A system comprising:
a processor;
a scoreboard; and
a memory, coupled to said processor, storing a branch on status instruction,
wherein upon execution of said branch on status instruction on said processor, said processor exposes said scoreboard to said branch on status instruction; said execution of said branch on status instruction reads a status of information from said scoreboard; and said execution of said branch on status instruction determines whether to branch to a label in said branch on status instruction based on said status.
16. The system of claim 15 wherein said scoreboard is included within said processor.
17. A structure comprising:
means for exposing a scoreboard of a processor on execution of a branch on status software instruction, on said processor, in a computer source program; and
means for explicitly controlling by said execution of said branch on status instruction which software instruction of a multiplicity of software instructions in said computer source program is executed, on said processor, after execution of said branch on status software instruction wherein said means for explicitly controlling reads a status of information in said scoreboard exposed on said execution of said branch on status software instruction to determine whether to branch to a label specified in said branch on status instruction.
18. A computer-program product comprising a medium of a common data carrier having stored therein computer readable code for a method comprising:
exposing a scoreboard of a processor on execution of a branch on status software instruction, on said processor, in a computer source program; and
explicitly controlling by said execution of said branch on status instruction which software instruction of a multiplicity of software instructions in said computer source program is executed, on said processor, after execution of said branch on status software instruction wherein said explicitly controlling reads a status of information in said scoreboard exposed on said execution of said branch on status software instruction to determine whether to branch to a label specified in said branch on status instruction.