Interpolated timestamps in high-speed data capture and analysis
View Patent ↗Methods and apparatuses for using interpolation to associate timestamp values to data received in a data capture and analysis system. An analysis processor receives data representing data transferred in a communications link. The analysis processor also receives timestamp signals. The analysis processor performs an interpolation between at least two timestamp values received and associates results of the interpolation with the data. The analysis processor analyzes the data. A logic device can be coupled to the analysis processor to interleave timestamp signal values with the data and transmit the interleaved data and timestamp signals to the analysis processor.
1. A data capture and analysis device, comprising:
a first tap for receiving data, wherein the tapped data represents data communicated in a first communications link at a rate between about 1 Gbps and 10 Gbps, wherein the data in the first communications link is allowed to continue on to its intended destination;
an interface configured to receive the tapped data;
a logic device configured to receive the tapped data and to interleave timestamps received from a timestamp source into the tapped data; and
a processor configured to receive the tapped data and the timestamps from the logic device and perform a linear or non-linear interpolation between at least two timestamps and to calculate intermediate timestamps and associate intermediate timestamps to at least portions of the tapped data, wherein the data capture and analysis device is configured to capture data at a rate between about 1 Gbps and 10 Gbps,
wherein the interpolation conducted in the data capture and analysis device takes into account compression of the tapped data.
2. The device of claim 1 , wherein the processor or a different processor analyzes the tapped data.
3. The device of claim 2 , wherein the processor that analyzes the tapped data analyzes the tapped data for at least one of protocol conformity errors, packet decoding errors, 10bit conversion errors, 8bit conversion errors, running disparity verification, CRC validation, identification of passwords, Voice over IP, virus activity, and performance issues.
4. The device of claim 1 , wherein the logic device is further configured to interleave the timestamps into the tapped data at predetermined intervals or intervals manually set prior to or during the operation of the logic device.
5. The device of claim 1 , wherein the logic device is further configured to receive a clock signal, wherein the timestamps are based at least in part on the clock signal received by increasing the frequency of the clock signal.
6. The device of claim 2 , further comprising:
at least one of a computer readable media coupled to the analysis processor for storing the tapped data, the timestamps, and a result of the interpolation and an output device for presenting a result of the analysis to a user.
7. The device of claim 1 , further comprising:
a second tap for receiving data, wherein the data tapped by the second tap represents data communicated in a second communications link at a rate between about 1 Gbps and 10 Gbps, wherein the data in the second communications link is allowed to continue on to its intended destination; and
a serializer-deserializer (SERDES) configured to receive and serialize the data tapped by the first and second taps, wherein the timestamps are interleaved into the serialized data.
8. A method for associating timestamps to data received by a data analysis apparatus, the method comprising:
tapping data at a rate between about 1 Gbps and 10 Gbps from a communications link, wherein the tapped data represents the data in the communications link as the data in the communications link is allowed to continue on to its intended destination;
receiving from a logic device a first timestamp, the logic device being configured to interleave timestamps into the tapped data; receiving from the logic device a second timestamp;
receiving a plurality of transferred data records from the logic device, the plurality of transferred data records including a first data record associated with the first timestamp and a second data record associated with the second timestamp, the plurality of transferred data records further including intermediate data records that are received intermediate to the first and second data records; and
calculating intermediate timestamp values using interpolation of the first and second timestamp signals, wherein the intermediate timestamp values are intermediate to the first and second timestamp signals,
wherein the plurality of data records is equal to N data records, wherein the first data record is the first received data record of the plurality of data records and the second data record is the Nth received data record of the plurality of data records wherein N is a number greater than 2.
9. The method of claim 8 , further comprising:
associating the intermediate timestamp values with the intermediate data records.
10. The method of claim 8 , further comprising:
storing at least one of the timestamp signals, the intermediate timestamp values, the first data record, the second data record, and the intermediate data records in at least one computer readable memory.
11. The method of claim 8 , further comprising:
interlacing the first and second timestamp signals with the plurality of data records.
12. The method of claim 8 , wherein the intermediate timestamp values are calculated at least in part using linear interpolation.
13. The method of claim 8 , wherein the interpolation takes into account compression of the data records.
14. The method of claim 8 , wherein the intermediate timestamp values are calculated at least in part using non-linear interpolation.
15. The method of claim 8 , wherein the intermediate timestamp values are calculated at least in part using extrapolation.
16. The method of claim 8 , wherein analysis includes analyzing the data for protocol conformity errors.
17. A data capture and analysis device, comprising:
a first tap for receiving data, wherein the tapped data represents data communicated in a first communications link at a rate between about 1 Gbps and 10 Gbps, wherein the data in the first communications link is allowed to continue on to its intended destination;
an interface configured to receive the tapped data;
a logic device configured to receive the tapped data and to interleave timestamps received from a timestamp source into the tapped data; and
a processor configured to receive the tapped data and the timestamps from the logic device and perform a linear or non-linear interpolation between at least two timestamps to calculate intermediate timestamps and to associate intermediate timestamps to at least portions of the tapped data, wherein the data capture and analysis device is configured to capture data at a rate between about 1 Gbps and 10 Gbps,
wherein, as part of the performance of interpolation, the processor of the data capture and analysis device is configured to adjust intermediate timestamps to take into account a compression format in which at least one data record represents a number of duplicate records that were repeated in the communications link.