IP Library Granted Patent US 7,465,614
Granted Patent B2
US 7,465,614 · App. 11/083,225 · Granted Dec 16, 2008

Method of fabricating semiconductor device and semiconductor fabricated by the same method

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Quick Facts
Patent No.
US 7,465,614
App. No.
11/083,225
Granted
Dec 16, 2008
Kind
B2
Abstract

A semiconductor device and method of fabricating the same are provided. The method includes: depositing a silicon layer containing amorphous silicon on a substrate; partially crystallizing the amorphous silicon by applying an annealing process to the silicon layer under an atmosphere of H 2 O at a predetermined temperature; forming a polycrystalline silicon layer by applying an laser annealing process to the partially crystallized amorphous silicon layer; forming a gate insulating layer on the polycrystalline silicon layer; and forming a gate electrode on the gate insulating layer, so that a substrate is prevented from being bent due to high temperature crystallization while the amorphous silicon is crystallized through an SPC process, thereby reducing defects of the thin film transistor.

Claims (31)

1. A method of fabricating a semiconductor device, comprising:

depositing a silicon layer containing amorphous silicon on a substrate;

partially crystallizing the amorphous silicon layer by applying an annealing process to the silicon layer under an atmosphere of H 2 O at a predetermined temperature, wherein the H 2 O pressure ranges from 10,000 Pa to 2 Mpa, with a non-crystallization percentage of the amorphous silicon layer ranging from 20% to 70% with respect to the total amorphous silicon layer;

forming a polycrystalline silicon layer by applying an laser annealing process to the partially crystallized amorphous silicon layer;

forming a gate insulating layer on the polycrystalline silicon layer; and

forming a gate electrode on the gate insulating layer.

2. The method according to claim 1 , wherein the non-crystallization percentage of the amorphous silicon layer ranges from 30% to 60% with respect to the total amorphous silicon layer.

3. The method according to claim 1 , further comprising implanting impurity ions into source and drain regions after depositing the amorphous silicon layer.

4. The method according to claim 3 , wherein the impurity ions implanted into the source and drain regions are activated while the amorphous silicon layer is partially crystallized.

5. The method according to claim 1 , further comprising:

implanting impurity ions into source and drain regions after forming the gate electrode, and

activating the impurity ions by the annealing process.

6. The method according to claim 1 , wherein the temperature ranges from 550° C. to 750° C.

7. The method according to claim 6 , wherein the temperature ranges from 600° C. to 710° C.

8. The method according to claim 1 , wherein the silicon layer has a thickness of 2,000 Å or less.

9. The method according to claim 8 , wherein the silicon layer has a thickness of 300 Å to 1,000 Å.

10. The method according to claim 1 , wherein the laser annealing process includes an excimer laser annealing (ELA) process.

11. The method according to claim 10 , wherein the ELA process uses a laser beam having an energy density of 200 mJ/cm 2 or more.

12. The method according to claim 11 , wherein the energy density ranges from 200 mJ/cm 2 to 350 mJ/cm 2 .

13. A method of fabricating a semiconductor device, comprising:

depositing a silicon layer containing amorphous silicon on a substrate;

forming a polycrystalline silicon layer by crystallizing the amorphous silicon into polycrystalline silicon through an annealing process performed under an atmosphere of H 2 O at a predetermined temperature, wherein the H 2 O pressure ranges from 10,000 Pa to 2 Mpa, with a non-crystallization percentage of the amorphous silicon layer ranging from 20% to 70% with respect to the total amorphous silicon layer;

recrystallizing the polycrystalline silicon layer by applying a laser annealing process; and

forming an impurity region on the polycrystalline silicon layer.

14. The method according to claim 13 , wherein the temperature ranges from 550° C. to 750° C.

15. The method according to claim 14 , wherein the temperature ranges from 600° C. to 710° C.

16. The method according to claim 13 , wherein the silicon layer has a thickness of 2,000 Å or less.

17. The method according to claim 16 , wherein the silicon layer has a thickness of 300 Å to 1,000 Å.

18. The method according to claim 13 , wherein the laser annealing process includes an excimer laser annealing (ELA) process.

19. The method according to claim 18 , wherein the ELA process uses a laser beam having an energy density of 200 mJ/cm 2 or more.

20. The method according to claim 19 , wherein the energy density ranges from 200 mJ/cm 2 to 350 mJ/cm 2 .

Assignments (3)
MERGER Recorded Sep 21, 2012
From: SAMSUNG MOBILE DISPLAY CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029087/0636 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2008
From: SAMSUNG SDI CO., LTD.
To: SAMSUNG MOBILE DISPLAY CO., LTD.
Reel/Frame 022034/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2005
From: KAKKAD, RAMESH
To: SAMSUNG SDI CO., LTD.
Reel/Frame 016395/0085 →