Power source voltage monitoring circuit for self-monitoring its power source voltage

1. A power source voltage monitoring circuit for monitoring self power source voltage, comprising:

a reference voltage circuit which is supplied with a power source voltage, generates a reference voltage from the power source voltage, and outputs the reference voltage;

a comparator which is supplied with the reference voltage and an output voltage generated from the power source voltage, compares the reference voltage and the output voltage, and outputs a result of the comparison; and

a control circuit, operatively coupled to the reference voltage circuit, which prevents the output voltage generated by the power source voltage from being input to the comparator until the reference voltage reaches a predetermined voltage.

2. A power source voltage monitoring circuit for monitoring self power source voltage, comprising:

a reference voltage circuit which is supplied with a power source voltage, and generates a reference voltage from the power source voltage, and outputs the reference voltage;

a comparator which is supplied with the reference voltage and an output voltage generated from the power source voltage, compares the reference voltages and the output voltage, and outputs a result of the comparison;

a first switch which controls conduction between the power source and the comparator; and

a second switch which is supplied with the reference voltage and controls the first switch in accordance with the output voltage of the reference voltage circuit,

wherein the second switch controls the first switch so that the output voltage is not supplied to the comparator until the reference voltage reaches a predetermined voltage.

3. A power source voltage monitoring circuit for monitoring self power source voltage comprising:

a reference voltage circuit which is supplied with a power source voltage, and generates and outputs a reference voltage in accordance with the power source voltage;

a comparator which compares a voltage input from a first input terminal and a voltage input from a second in put terminal and outputs a result of the comparison;

a first transistor which controls conduction between the power source and the comparator; and

a second transistor whose gate is supplied with the output voltage output from the reference voltage circuit and whose drain is connected to a gate of the first transistor,

wherein the first input terminal of the comparator is supplied with a voltage switched by the first transistor, and the second transistor supplies voltage to the gate of the first transistor so that the voltage in accordance with the power source voltage is not supplied to the comparator before the output voltage output from the reference Voltage circuit reaches a predetermined reference voltage.

4. The power source voltage monitoring circuit of claim 3 , wherein a current from a current source originating from the reference voltage circuit is supplied to a first node between the gate of the first transistor and the drain of the second transistor.

5. The power source voltage monitoring circuit of claim 3 , wherein a node between the gate of the first transistor and the drain of the second transistor is connected to a resistor which is connected to the power source.

6. The power source voltage monitoring circuit of claim 4 , wherein a second node between the gate of the first transistor and the drain of the second transistor is connected to a capacitor which is connected to the power source.

7. A power source voltage monitoring circuit for monitoring self power source voltage comprising:

a reference voltage circuit which is supplied with a power source voltage, and generates and outputs a reference voltage in accordance with the power source voltage;

a comparator which compares a voltage input from a first input terminal and a voltage input from a second input terminal via the reference voltage circuit;

a P-channel MOS transistor whose drain is connected to the power source and a source is connected to the first input terminal via a dividing voltage circuit; and

an N-channel MOS transistor whose gate is supplied with the output voltage from the reference voltage circuit, drain is connected the gate of the P-channel MOS transistor, and a source is grounded, wherein the N-channel MOS transistor turns on when the voltage supplied to the gate thereof reaches a predetermined reference voltage.

8. The power source voltage monitoring circuit of claim 7 , wherein a current from a current source originating from the reference voltage circuit is supplied to a first node between the gate of the P-channel MOS transistor and the drain of the N-channel MOS transistor.

9. The power source voltage monitoring circuit of claim 7 , wherein a node between the gate of the P-channel MOS transistor and the drain of the N-channel MOS transistor is connected to a resistor which is connected to the power source.

10. The power source voltage monitoring circuit of claim 8 , wherein a second node between the gate of the P-channel MOS transistor and the drain of the N-channel MOS transistor is connected to a capacitor which is connected to the power source.