Timing generation circuit for display apparatus and display apparatus incorporating the same
View Patent ↗A timing generation circuit ( 15 ) is formed integrally on the same glass substrate ( 11 ) together with a display area section ( 12 ) similarly to an H driver ( 13 U) and a V driver ( 14 ), and timing pulses to be used by the H driver ( 13 U) and the V driver ( 14 ) are produced based on timing data produced by a shift register ( 31 U) of the H driver ( 13 U) and a shift register ( 14 A) of the V driver ( 14 ). The invention thereby provides a timing generation circuit which can contribute to miniaturization and reduction of the cost of the set and a display apparatus of the active matrix type in which the timing generation circuit is incorporated.
1. A display apparatus comprising: a display area section wherein pixels each having an electro-optical element are disposed in rows and columns, a vertical driving circuit for selecting said pixels of said display area section in a unit of a row and a horizontal driving circuit for supplying an image signal to each of the pixels of the row selected by said vertical driving circuit are formed integrally on the same substrate, characterized in that a shift register which forms said horizontal driving circuit is disposed on the outermost side with respect to said display area section, and a clock line for transmitting a single-phase transfer clock to transfer stages of said shift registers is wired on the further outer side of said shift register, characterized in that a switch is interposed between each of the transfer stages of said shift register and said clock line for selectively supplying the single-phase transfer clock to the transfer stage of said shift register, and wherein each of the transfer stages of said shift register comprises a clocked inverter and a clock selection control circuit.
2. A display apparatus of the active matrix type according to claim 1 , characterized in that a clock production circuit for dividing a dot clock into two to produce the single-phase transfer clock is provided on said same substrate.
3. A display apparatus according to claim 1 , characterized in that a pair of said horizontal driving circuits are disposed along two sides of said display area section.
4. The display apparatus according to claim 1 , wherein said clocked inverter latches said single-phase transfer clock supplied thereto through said switch.
5. The display apparatus according to claim 1 , wherein said clock selection control circuit of a current transfer stage that controls said switch is based on a clocked inverter output of a preceding transfer stage and a clocked inverter output of the current transfer stage.