Floating gate non-volatile memory
View Patent ↗A floating non-volatile memory has a substrate and source and drain regions disposed in a surface region of the substrate and spaced apart from each other with a channel forming semiconductor region disposed therebetween. A gate insulating film is disposed on the channel forming semiconductor region. A single crystal control region is disposed in the surface region of the substrate and is electrically separated from the channel forming semiconductor region. A control gate insulating film is disposed on the single crystal control region. A floating gate is disposed on the control gate insulating film and is capacitively coupled with the single crystal control region. A chemical-vapor-deposited shield insulating film is formed in a gas atmosphere charge-balanced on the floating gate. A shield conductive film is disposed on the chemical-vapor-deposited shield insulating film and capacitively coupled with the floating gate.
1. A floating gate non-volatile memory comprising:
a substrate;
a channel forming semiconductor region of a first conductivity type disposed in a substrate surface region of the substrate;
a source region and a drain region each disposed in the substrate surface region, the source and drain regions being spaced from each other with the channel forming semiconductor region disposed therebetween;
a gate insulating film disposed on the channel forming semiconductor region;
a single crystal control region electrically separated from the channel forming semiconductor region and disposed in the substrate surface region;
a control gate insulating film disposed on the single crystal control region;
a floating gate disposed on the gate insulating film and extending onto the control gate insulating film so as to be capacitively coupled with the single crystal control region;
a chemical-vapor-deposited shield insulating film formed in a gas atmosphere charge-balanced on the floating gate; and
a shield conductive film disposed on the chemical- vapor-deposited shield insulating film and capacitively coupled with the floating gate.
2. A floating gate non-volatile memory according to claim 1 ; wherein the substrate comprises a semiconductor substrate; and wherein the single crystal control region is spaced from the channel forming semiconductor region and has a conductivity type opposite to that of the substrate surface region.
3. A floating gate non-volatile memory according to claim 1 ; wherein the substrate comprises a supporting substrate and a semiconductor layer insulated from the supporting substrate and forming the substrate surface region, the channel forming semiconductor region being formed at a part of the semiconductor layer; and wherein the single crystal control region is spaced from the channel forming semiconductor region by an insulating film.
4. A floating gate non-volatile memory according to claim 1 ; wherein the shield conductive film is supplied with a preselected potential at a time of reading from the floating gate non-volatile memory to adjust a gate threshold voltage measured from the single crystal control region.
5. A floating gate non-volatile memory according to claim 1 ; wherein the shield conductive film receives a preselected potential having the same sign as that of a supply potential supplied to the single crystal control region at a time of writing to the floating gate non-volatile memory.
6. A floating gate non-volatile memory according to claim 1 ; wherein at a time of erasing from the floating gate non-volatile memory, the shield conductive film receives one of a preselected potential having the same sign as that of a supply potential supplied to the single crystal control region, a preselected potential having a sign opposite to that of a supply potential supplied to the source region, and a preselected potential having a sign opposite to that of a supply potential supplied to the drain region.
7. A floating gate non-volatile memory according to claim 1 ; wherein the chemical-vapor-deposited shield insulating film comprises a thermal-chemical-vapor-deposited shield insulating film.
8. A floating gate non-volatile memory according to claim 1 ; wherein the chemical-vapor-deposited shield insulating film comprises a radical-chemical-vapor-deposited shield insulating film.
9. A floating gate non-volatile memory according to claim 1 ; wherein the chemical-vapor-deposited shield insulating film comprises a photo-assisted-chemical-vapor-deposited shield insulating film.
10. A floating gate non-volatile memory comprising:
a substrate having a surface region;
a channel forming semiconductor region disposed in the surface region of the substrate;
a source region and a drain region each disposed in the surface region of the substrate, the source and drain regions being spaced apart from each other with the channel forming semiconductor region disposed therebetween;
a gate insulating film disposed on the channel forming semiconductor region;
a single crystal control region disposed in the surface region of the substrate and electrically separated from the channel forming semiconductor region;
a control gate insulating film disposed on the single crystal control region;
a floating gate disposed on the gate insulating film and on the control gate insulating film and capacitively coupled with the single crystal control region;
a chemical-vapor-deposited shield insulating film formed in a charged-balanced gas atmosphere and disposed on the floating gate; and
a shield conductive film disposed on the chemical-vapor-deposited shield insulating film and capacitively coupled with the floating gate.
11. A floating gate non-volatile memory according to claim 10 ; wherein the charge-balanced chemical-vapor-deposited shield insulating film is formed by charge-balancing a gas atmosphere on the floating gate.
12. A floating gate non-volatile memory according to claim 10 ; wherein the chemical-vapor-deposited shield insulating film comprises a thermal-chemical-vapor-deposited shield insulating film.
13. A floating gate non-volatile memory according to claim 10 ; wherein the chemical-vapor-deposited shield insulating film comprises a radical-chemical-vapor-deposited shield insulating film.
14. A floating gate non-volatile memory according to claim 10 ; wherein the chemical-vapor-deposited shield insulating film comprises a photo-assisted-chemical-vapor-deposited shield insulating film.
15. A floating gate non-volatile memory according to claim 10 ; wherein the substrate comprises a semiconductor substrate; and wherein the single crystal control region is spaced from the channel forming semiconductor region by an insulating film and has a conductivity type opposite to that of the substrate surface region.
16. A floating gate non-volatile memory comprising:
a substrate comprised of a supporting substrate and a semiconductor layer insulated from the supporting substrate;
a channel forming semiconductor region disposed in the semiconductor layer;
a source region and a drain region each disposed in the semiconductor layer, the source and drain regions being spaced apart from each other with the channel forming semiconductor region disposed therebetween;
a gate insulating film disposed on the channel forming semiconductor region;
a single crystal control region disposed in the semiconductor layer and electrically separated from the channel forming semiconductor region by an insulating film;
a control gate insulating film disposed on the single crystal control region;
a floating gate disposed on the gate insulating film and on the control gate insulating film and capacitively coupled with the single crystal control region;
a chemical-vapor-deposited charge-balanced shield insulating film disposed on the floating gate; and
a shield conductive film disposed on the chemical-vapor-deposited charge-balanced shield insulating film and capacitively coupled with the floating gate.
17. A floating gate non-volatile memory according to claim 10 ; further comprising an insulating film disposed between the single crystal control region and the channel forming semiconductor region.
18. A floating gate non-volatile memory according to claim 16 ; wherein the chemical-vapor-deposited charge-balanced shield insulating film comprises one of a thermal-chemical-vapor-deposited charge-balanced shield insulating film, a radical-chemical-vapor-deposited charge-balanced shield insulating film, and a photo-assisted-chemical-vapor-deposited charge-balanced shield insulating film.
19. A floating gate non-volatile memory according to claim 1 ; wherein the chemical-vapor-deposited shield insulating film is formed in the gas atmosphere charge-balanced on the floating gate so that an electric charge included into the chemical-vapor-deposited shield insulating film is reduced to a level that does not cause variation of a gate threshold voltage of the floating gate non-volatile memory.
20. A floating gate non-volatile memory according to claim 1 ; wherein the floating gate comprises a poly-crystalline floating gate.
21. A floating gate non-volatile memory according to claim 3 ; wherein the single crystal control region is biased in a different polarity voltage during writing and erasing.
22. A floating gate non-volatile memory according to claim 10 ; wherein the floating gate comprises a poly-crystalline floating gate.
23. A floating gate non-volatile memory according to claim 16 ; wherein the floating gate comprises a poly-crystalline floating gate.
24. A floating gate non-volatile memory according to claim 16 ; wherein at a time of erasing from the floating gate non-volatile memory, the shield conductive film receives one of a preselected potential having the same polarity as that of a supply potential supplied to the single crystal control region, a preselected potential having a polarity opposite to that of a supply potential supplied to the source region, and a preselected potential having a polarity opposite to that of a supply potential supplied to the drain region.