Amplifier circuit and display device
View Patent ↗Offset canceling amplifier circuit in which a high accuracy of output with a suppressed output offset is achieved and a variation in a slew rate is also suppressed, and a display device having the amplifier circuit. A first differential pair (M 5, M 6 ) connected between a first current source (M 9 ) and a common load circuit (M 1, M 2 ) and a second differential pair (M 3, M 4 ) connected between a second current source (M 8 ) between the common load circuit (M 1, M 2 ) are provided. A switch (SW 1 ) connected between one input of the first differential pair (M 5, M 6 ) and an input terminal ( 1 ), a switch (SW 2 ) connected between the one input of the differential pair (M 5, M 6 ) and an output terminal ( 2 ), a switch (SW 3 ) connected between one input of the second differential pair (M 3, M 4 ) and the output terminal ( 2 ), and a capacitance element (C 1 ) connected to the one input of the second differential pair (M 3, M 4 ) are provided. The other input of the first differential pair (M 5, M 6 ) is connected to the input terminal ( 1 ), and the other input of the second differential pair (M 3, M 4 ) is connected to a reference voltage input terminal ( 3 ). An amplifying operation by an amplifying element (M 7 ) is performed responsive to a common output signal of the two differential pairs, and circuits (SW 11, SW 12 ) for controlling activation or deactivation of at least one of the first and second current sources are provided.
1. A differential amplifier circuit comprising:
first and second differential pairs;
one load circuit connected in common to said first and second differential pairs;
first and second current sources for supplying current to said first and second differential pairs, respectively;
said differential amplifier circuit performing an amplifying operation responsive to a common output signal of said first and second differential pairs, wherein said differential amplifier circuit further comprises circuits for modulating and controlling a current value of at least one of said first and second current sources, each of said first and second current sources includes two distinct current sources in parallel, one of the two distinct current sources is in series with a switch, operation of said switch modulates the current value, said first and second current sources are provides between a common source of each differential pair and a power supply.
2. A differential amplifier circuit comprising:
a load circuit connected to a first power supply;
first and second differential pairs connected in common to said load circuit;
first and second current sources for supplying currents to said first and second differential pairs, respectively;
an amplifying element for driving an output terminal upon receipt of an output connected in common to said first and second differential pairs;
a first switch connected between one input of said first differential pair and an input terminal;
a second switch connected between the one input of said first differential pair and said output terminal;
a third switch connected between one input of said second differential pair and said output terminal;
a capacitance element connected to the one input of said second differential pair; and
a fourth switch connected between said first differential pair and a second power supply, said fourth switch being connected in series with said first current source;
the other input of said first differential pair and the other input of said second differential pair being both connected to said input terminal.
3. The differential amplifier circuit according to claim 2 , wherein a fifth switch is connected between said second differential pair and a second power supply, said fifth switch being connected in series with said second current source.
4. The differential amplifier circuit according to claim 2 , wherein a data output period comprises a first period and a second period;
during the first period, said first and third switches are turned on, and said second switch is turned off;
during the second period, said first and third switches are turned off, and said second switch is turned on; and
said fourth switch is turned on after being turned off for a predetermined period after a start of the first period.
5. A differential amplifier circuit comprising:
a load circuit connected to a first power supply;
first and second differential pairs connected in common to said load circuit;
first and second current sources for supplying currents to said first and second differential pairs, respectively;
an amplifying element for driving an output terminal upon receipt of an output connected in common to said first and second differential pairs;
a first switch connected between one input of said first differential pair and an input terminal;
a second switch connected between the one input of said first differential pair and an output terminal;
a third switch connected between one input of said second differential pair and said output terminal;
a capacitance element connected to the one input of said second differential pair;
a fourth switch connected between said first differential pair and a second power supply, said fourth switch being connected in series with said first current source; and
a fifth switch connected between said second differential pair and said second power supply, said fifth switch being connected in series with said second current source;
the other input of said first differential pair being connected to said input terminal; and
the other input of said second differential pair being connected to a reference voltage input terminal.
6. The differential amplifier circuit according to claim 5 , wherein a data output period comprises a first period and a second period;
during the first period, said first and third switches are turned on, and said second switch is turned off;
during the second period, said first and third switches are turned off, and said second switch is turned on;
said fourth switch is turned on after being turned off for a predetermined period after a start of the first period; and
said fifth switch is turned off for a predetermined period after a start of the second period and turned on during periods other than the predetermined period after the start of the second period, in the data output period.
7. A differential amplifier circuit comprising:
a load circuit connected to a first power supply;
first and second differential pairs connected in common to said load circuit;
first and second current sources for supplying currents to said first and second differential pairs, respectively;
an amplifying element for driving an output terminal upon receipt of an output connected in common to said first and second differential pairs;
a first switch connected between one input of said first differential pair and an input terminal;
a second switch connected between the one input of said first differential pair and said output terminal;
a third switch connected between one input of said second differential pair and said output terminal; and
a capacitance element connected to the one input of said second differential pair;
the other input of said first differential pair and the other input of said second differential pair being both connected to said input terminal;
a series circuit comprising a third current source and a fourth switch being connected between said second differential pair and a second power supply, said series circuit being connected in parallel with said second current source.
8. The differential amplifier circuit according to claim 7 , wherein a data output period comprises a first period and a second period;
during the first period, said first and third switches are turned on, and said second switch is turned off;
during the second period, said first and third switches are turned off, and said second switch is turned on; and
said fourth switch is turned off after being turned on for a predetermined period after the start of the first period.
9. A differential amplifier circuit comprising:
a load circuit connected to a first power supply;
first and second differential pairs connected in common to said load circuit;
first and second current sources for supplying currents to said first and second differential pairs, respectively;
an amplifying element for driving an output terminal upon receipt of an output connected in common to said first and second differential pairs;
a first switch connected between one input of said first differential pair and an input terminal;
a second switch connected between the one input of said first differential pair and an output terminal;
a third switch connected between one input of said second differential pair and said output terminal; and
a capacitance element connected to the one input of said second differential pair;
the other input of said first differential pair being connected to said input terminal;
the other input of said second differential pair being connected to a reference voltage input terminal;
a series circuit comprising a third current source and a fourth switch being connected between said first differential pair and a second power supply, said series circuit being connected in parallel with said first current source;
a series circuit comprising a fourth current source and a fifth switch being connected between said second differential pair and said second power supply, said series circuit being connected in parallel with said second current source.
10. The differential amplifier circuit according to claim 9 , wherein a data output period comprises a first period and a second period;
during the first period, said first and third switches are turned on, and said second switch is turned off;
during the second period, said first and third switches are turned off, and said second switch is turned on;
said fifth switch is turned off after being turned on for a predetermined period after a start of the first period; and
said fourth switch is turned on for a predetermined period after a start of the second period and turned off during periods other than the predetermined period after the start of the second period, in the data output period.
11. A display device comprising an amplifier circuit for inputting a gray-scale voltage and driving a data line connected to display elements, wherein said display device comprises a differential amplifier circuit according to claim 1 as said amplifier circuit.
12. A display device comprising an amplifier circuit for inputting a gray-scale voltage and driving a data line connected to display elements, wherein said display device comprises a differential amplifier circuit according to claim 2 as said amplifier circuit.
13. A display device comprising an amplifier circuit for inputting a gray-scale voltage and driving a data line connected to display elements, wherein said display device comprises a differential amplifier circuit according to claim 5 as said amplifier circuit.
14. A display device comprising an amplifier circuit for inputting a gray-scale voltage and driving a data line connected to display elements, wherein said display device comprises a differential amplifier circuit according to claim 7 as said amplifier circuit.
15. A display device comprising an amplifier circuit for inputting a gray-scale voltage and driving a data line connected to display elements, wherein said display device comprises a differential amplifier circuit according to claim 9 as said amplifier circuit.
16. A differential amplifier circuit comprising:
a load circuit connected to a first power supply;
first and second differential pairs connected in common to said load circuit;
first and second current sources for supplying currents to said first and second differential pairs, respectively;
an amplifying element for driving an output terminal upon receipt of an output connected in common to said first and second differential pairs;
a first switch connected between one input of said first differential pair and an input terminal;
a second switch connected between the one input of said first differential pair and said output terminal;
a third switch connected between one input of said second differential pair and said output terminal; and
a capacitance element connected to the one input of said second differential pair, the other input of said first differential pair and the other input of said second differential pair being both connected to said input terminal, wherein
said differential amplifier circuit further comprises circuits for controlling activation/deactivation of at least one of said first and second current sources.
17. A differential amplifier circuit comprising:
a load circuit connected to a first power supply;
first and second differential pairs connected in common to said load circuit;
first and second current sources for supplying currents to said first and second differential pairs, respectively;
an amplifying element for driving an output terminal upon receipt of an output connected in common to said first and second differential pairs;
a first switch connected between one input of said first differential pair and an input terminal;
a second switch connected between the one input of said first differential pair and said output terminal;
a third switch connected between one input of said second differential pair and said output terminal; and
a capacitance element connected to the one input of said second differential pair, the other input of said first differential pair and the other input of said second differential pair being both connected to said input terminal, wherein
said differential amplifier circuit further comprises circuits for modulating and controlling a current value of at least one of said first and second current sources.
18. A differential amplifier circuit comprising:
a load circuit connected to a first power supply;
first and second differential pairs connected in common to said load circuit;
first and second current sources for supplying currents to said first and second differential pairs, respectively;
an amplifying element for driving an output terminal upon receipt of an output connected in common to said first and second differential pairs;
a first switch connected between one input of said first differential pair and an input terminal;
a second switch connected between the one input of said first differential pair and said output terminal;
a third switch connected between one input of said second differential pair and said output terminal;
a capacitance element connected to the one input of said second differential pair, the other input of said first differential pair and the other input of said second differential pair being both connected to said input terminal, wherein
said differential amplifier circuit further comprises circuits for controlling activation/deactivation of at least one of said first and second differential pairs.