Memory device for improved reference current configuration
View Patent ↗A memory device is composed of a memory array including floating gate memory cells; a sense amplifier designed to identify data stored in the memory array; and a reference current setting unit responsive to a trimming code for providing a reference current for the sense amplifier. The trimming code is defined as being all-0 for a reference current level to identify data stored in the memory array as logic “1”, and is defined as being all-1 for a reference current level to identify data stored in the memory array as logic “0”.
1. A memory device comprising:
a memory array including floating gate memory cells;
a sense amplifier designed to identify data stored in said memory array;
a reference current setting unit responsive to a trimming code for providing a reference current for said sense amplifier,
wherein said trimming code is defined as being all-0 for a reference current level to identify data stored in said memory array as logic “1”, and is defined as being all-1 for a reference current level to identify data stored in said memory array as logic “0”.
2. The memory device according to claim 1 , wherein said sense amplifier is designed to identify data stored in said memory array as logic “1” when a signal current from said memory array is larger than said reference current, and as logic “0” when said signal current is smaller than said reference current,
wherein said trimming code is defined as being all-0 for the minimum reference current level, and defined as being all-1 for the maximum reference current level.
3. The memory device according to claim 1 , wherein said reference current setting unit is configured with a default trimming code as said trimming code when said memory device is initialized, said default trimming code being closest to the mean value of said trimming code.
4. The memory device according to claim 1 , wherein said memory array stores therein an appropriate trimming code,
wherein said reference current setting unit is designed to configured with a default trimming code as said trimming code when said memory device is initialized,
wherein said sense amplifier is designed to obtain said appropriate trimming code from said memory array using a reference current developed in response to said default trimming code,
wherein said reference current setting unit is designed to be configured with said appropriate trimming code in place of said default trimming code.
5. The memory device according to claim 4 , wherein said reference current setting unit receives said default trimming code from an ROM during a reset sequence of a computer system.
6. The memory device according to claim 4 , wherein said reference current setting unit includes a register designed to be automatically configured with said default trimming code upon initiation of a reset sequence of a computer system.
7. A method for configuring a memory device including a floating gate memory array with a trimming code indicative of a desired reference current level, said method comprising:
configuring a reference current setting unit within said memory device with a default trimming code;
developing a first reference current in response to said default trimming code;
identifying an appropriate trimming code stored in a floating gate memory array using said first reference current; and
configuring said reference current setting unit with said identified appropriate trimming code in place of said default trimming code,
wherein said default trimming code and said appropriate trimming code are defined as being all-0 for the minimum reference current level, and defined as being all-1 for the maximum reference current level.