Method of fabricating in-plane switching mode liquid crystal display device
View Patent ↗An in-plane switching mode liquid crystal display device includes first and second substrates, a plurality of gate lines and data lines on the first substrate to define a plurality of pixel areas, a driving element in each of the pixel areas of the first substrate, at least one first and second electrodes in each of the pixel areas of the first substrate, a black matrix on the second substrate, the black matrix being made of a black resin material having resistance not greater than 10 8 Ωcm and a dielectric constant not less than 14, and a liquid crystal layer between the first and second substrates.
1. A method of fabricating an in-plane switching mode liquid crystal display device, comprising:
forming a plurality of gate lines and data lines on a first substrate to define a plurality of pixel areas;
forming a driving element in each of the pixel areas of the first substrate;
forming at least one first and second electrodes in each of the pixel areas of the first substrate;
forming a black matrix on a second substrate, the black matrix including first portions parallel to the gate line and second portion parallel to the data line, a resistance and a dielectric constant of the first portions being same as that of the second portions and
forming a liquid crystal layer between the first and second substrates,
wherein the black matrix is made of a black resin material having resistance not greater than 10 8 Ωcm and a dielectric constant not less than 14 in a measure frequency of 1 kHz.
2. The method of claim 1 , wherein the forming at least one first and second electrodes includes forming the first electrode near a corresponding one of the data lines.
3. The method of claim 1 , wherein the forming a driving element includes forming a thin film transistor.
4. The method of claim 3 , wherein the forming a thin film transistor includes:
forming a gate electrode on the first substrate;
forming an insulating layer on the first substrate covering the gate electrode;
forming a semiconductor layer on the insulating layer;
forming a source electrode and a drain electrode on the semiconductor layer; and
forming a passivation layer on the first substrate covering the source and drain electrodes.
5. The method of claim 4 , wherein the forming the first and second electrodes includes forming the first electrode on the first substrate and the second electrode on the gate insulating layer.
6. The method of claim 5 , wherein the forming the first and second electrodes includes forming the first electrode near the data line.
7. The method of claim 4 , wherein the forming the first and second electrodes includes forming the first electrode on the gate insulating layer and the second electrode on the first substrate.
8. The method of claim 7 , wherein the forming the first and second electrodes includes forming the first electrode near the data line.
9. The method of claim 4 , wherein the forming the first and second electrodes includes forming the first and second electrodes on the passivation layer.
10. The method of claim 4 , wherein the forming the first and second electrodes includes forming the first and second electrodes on the gate insulating layer.
11. The method of claim 4 , wherein the forming the first and second electrodes includes forming the first and second electrodes on the first substrate.
12. The method of claim 1 , further comprising forming a color filter layer on the second substrate.