Granted Patent B2

US 7,534,636 · App. 11/097,534 · Granted May 19, 2009

Abstract

Claims (26)

1. A method for forming a lid for a wafer-scale package, comprising:

forming a lid cavity having an angled sidewall in a substrate;

forming an oxide layer on the substrate over the lid cavity and over a bond area around the lid cavity;

forming a reflective layer on the oxide layer, a portion of the reflective layer over the angled sidewall forming a mirror on the angled sidewall for reflecting a light;

forming a barrier layer on the reflective layer, the barrier layer being solder-nonwettable, the barrier layer having a thickness less than a quarter wavelength of the light and being transparent to the light;

etching a portion of the barrier layer down to the reflective layer over the bond area; and

forming a solder layer on the reflective layer within the etched portion of the barrier layer over the bond area, wherein the barrier layer prevents the solder layer from wicking into the lid cavity and affecting said reflecting.

2. The method of claim 1 , wherein said forming a lid cavity in the substrate comprises anisotropically etching the substrate to form the lid cavity, the substrate comprising a first crystallographic plane at an offset from a wafer top surface and the angled sidewall being along a second crystallographic plane.

3. The method of claim 2 , wherein the first crystallographic plane is oriented so that the second crystallographic plane is oriented 45° from a normal to the wafer top surface and said anisotropic etching comprises a wet etch using a KOH solution.

4. The method of claim 1 , wherein said forming an oxide layer comprises thermally growing the oxide layer.

5. The method of claim 1 , wherein said forming a reflective layer comprises forming a metal stack layer.

6. The method of claim 5 , wherein said forming a barrier layer comprises thermally depositing a metal oxide layer upon the metal stack layer.

7. The method of claim 6 , wherein the metal stack layer comprises a titanium layer, a platinum layer atop the titanium layer, and a gold layer atop the platinum layer, and the metal oxide layer comprises a titanium dioxide layer.

8. The method of claim 7 , wherein said etching a portion of the baffler layer comprises a wet etch using a diluted HF and nitric acid solution.

9. The method of claim 5 , wherein said forming a barrier layer comprises a method selected from the group consisting of thermally depositing, sputtering, reactive sputtering, chemical vapor deposition, and plasma enhanced chemical vapor deposition.

10. The method of claim 9 , wherein the baffler layer is selected from the group consisting of nitride, boride, fluoride, fluorocarbon, and polyimide.

11. The method of claim 1 , wherein said forming a solder layer comprises plating the solder layer on the portion of the reflective layer.

12. The method of claim 1 , wherein said etching a portion of the barrier layer comprises:

patterning a photoresist layer over the barrier layer to form a window over the portion of the baffler layer; and

etching the portion of the barrier layer exposed by the window.

13. The method of claim 12 , further comprising stripping the photoresist after said forming the solder layer on the portion of the reflective layer.

14. The method of clam 12 , further comprising stripping the photoresist prior to said forming the solder layer on the portion of the reflective layer.

15. The method of claim 1 , wherein said solder layer comprises a gold-tin solder.

16. The method of claim 1 , wherein the light is collimated.

17. The method of claim 1 , wherein the lid cavity of the lid for a wafer-scale package forms a space to accommodate a plurality of dies.

18. The method of claim 1 , further comprising forming a wafer of a plurality of lids for wafer-scale optoelectronic packages.

Assignments (8)