IP Library Granted Patent US 7,145,394
Granted Patent B2
US 7,145,394 · App. 11/098,454 · Granted Dec 5, 2006

High frequency power amplifier module, and wireless communication system

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Quick Facts
Patent No.
US 7,145,394
App. No.
11/098,454
Granted
Dec 5, 2006
Kind
B2
Abstract

A high frequency power amplifier module of a multistage amplifier construction comprising: an input terminal; an output terminal; a control terminal; and a mode switching terminal. The first amplification stage includes a dual gate FET, and a bias voltage according to a signal is applied to the first gate and the second gate of the dual gate FET from the control terminal and the mode switching terminal, and a radio signal from the input terminal is applied to the second gate such as the source of the dual gate FET. In dependence upon the signal from the mode switching terminal, the mode of the high frequency power amplifier module is for the GSM (i.e., for a non-linear amplifying action) and for the EDGE (for a linear amplifying action).

Claims (13)

1. A high frequency power amplifier module, comprising:

an input terminal for receiving a high frequency signal;

a control terminal for receiving a control signal;

a dual gate type field effect transistor including a first gate and a second gate between a drain and a source, the first gate being closer to the drain and coupled to receive a signal according to the control signal from the control terminal, and the second gate being closer to the source and coupled to receive the high frequency signal from the input terminal;

an output terminal coupled to the drain; and

a bias circuit having an input coupled to the control terminal and an output coupled to the second gate of the dual gate type field effect transistor, and for generating a bias voltage according to the control signal to the second gate of the dual gate type field effect transistor, wherein the signal is the bias voltage.

2. A high frequency power amplifier module, comprising:

an input terminal for receiving a high frequency signal;

a control terminal for receiving a control signal;

a dual gate type field effect transistor including a first gate and a second gate between a drain and a source, the first gate being closer to the drain and coupled to receive a signal according to the control signal from the control terminal, and the second gate being closer to the source and coupled to receive the high frequency signal from the input terminal; and

an output terminal coupled to the drain;

wherein the control signal has a plurality of levels according to a plurality of operation modes, and

wherein the plurality of operation modes include a GSM (global system for mobile communication) mode and an EDGE (enhanced data rates for GSM evolution) mode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2006
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 017477/0647 →