Nonvolatile semiconductor memory device for outputting a status signal having an output data width wider than an input data width
View Patent ↗An n-bit status signal indicating an execution state of a write command is outputted from a status register. At the time of data writing, an output switching circuit outputs (n×m)-bit data in which a status signal pattern repeats m times. At the time of data reading, the output switching circuit outputs data stored in a memory cell array.
1. A nonvolatile semiconductor memory device for outputting a status signal which has an output data width wider than an input data width and indicates an execution state of a write command, comprising:
a memory cell array having a plurality of nonvolatile memory cells disposed thereon; and
a control circuit for controlling access to the memory cell array,
wherein the control circuit includes:
a status signal outputting section for outputting the status signal having a data width of n (n is a natural number); and
an output switching section for switching output between a signal having a data width of (n×m), in which a same status signal pattern repeats m (m is a natural number) times, and data stored in the memory cell array.
2. The nonvolatile semiconductor memory device according to claim 1 ,
wherein a value of m is determined based on a signal inputted from an external source.
3. The nonvolatile semiconductor memory device according to claim 1 ,
wherein a value of m is determined based on a first control signal inputted via a wire to which a fixed voltage is applied.
4. The nonvolatile semiconductor memory device according to claim 3 ,
wherein the nonvolatile semiconductor memory device is operable to change the value m, which is determined based on the first control signal, based on a second control signal outputted from an external apparatus.
5. The nonvolatile semiconductor memory device according to claim 4 ,
wherein the nonvolatile semiconductor memory device is operable to change the value of m, which is determined based on the second control signal, based on a third control signal outputted from a host system used in conjunction with the device.
6. The nonvolatile semiconductor memory device according to claim 1 ,
wherein a value of (n×m) is a power of two.
7. The nonvolatile semiconductor memory device according to claim 1 ,
wherein an output data width of the output switching section is n×k (k is a natural number equal to or greater than m), and n×(k−m) bit is set to either one or zero.