IP Library Granted Patent US 7,627,720
Granted Patent B2
US 7,627,720 · App. 11/101,768 · Granted Dec 1, 2009

System and method for directional prefetching

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Quick Facts
Patent No.
US 7,627,720
App. No.
11/101,768
Granted
Dec 1, 2009
Kind
B2
Abstract

Systems and methods that provide directional prefetching are provided. In one embodiment, a method may include one or more of the following: storing a first block and a second block in a prefetch buffer; associating a first block access with a backward prefetch scheme; associating a second block access with a forward prefetch scheme; and, if the first block is accessed before the second block, then performing a backward prefetch with respect to the first block.

Claims (37)

1. A method for directional prefetching, the method comprising:

in response to a prefetch buffer miss:

prefetching a first block, storing the first block, and associating an access of the first block with a backward prefetch, and

prefetching a second block, storing the second block, and associating an access of the second block with a forward prefetch scheme; and

if the first block is accessed before the second block, then performing a backward prefetch with respect to the first block.

2. The method of claim 1 , wherein the

prefetch buffer miss is a prefetch buffer miss of the first block.

3. The method of claim 1 , wherein:

prefetching the first block comprises generating a first prefetch request for the first block; and

prefetching the second block comprises generating a second prefetch request for the second block.

4. The method of claim 1 , wherein prefetching the first block and prefetching the second block correspond to a same prefetch request.

5. The method of claim 1 , wherein:

prefetching the first block comprises generating a prefetch request for the first block, wherein the prefetch request comprises information regarding where in memory to store the first block; and

storing the first block comprises determining where to store the first block in memory based, at least in part, on the information regarding where in memory to store the first block.

6. The method of claim 1 , wherein the first block and the second block form a pair of aligned blocks.

7. The method of claim 1 , wherein performing a backward prefetch with respect to the first block comprises:

determining the state of a flag corresponding to the first block to determine whether accessing the first block should result in a forward prefetch or a backward prefetch; and

performing the backward prefetch with respect to the first block based, at least in part, on the determined state of the flag.

8. A system for directional prefetching, the system comprising:

a memory; and

at least one module that, in response to a prefetch buffer miss, is adapted to:

prefetch a first block, store the first block in the memory, and associate an access of the first block with a backward prefetch scheme;

prefetch a second block, store the second block in the memory, and associate an access of the second block with a forward prefetch scheme; and

if the first block is accessed before the second block, then perform a backward prefetch with respect to the first block.

9. The system of claim 8 , wherein the

prefetch buffer miss is a prefetch buffer miss of the first block.

10. The system of claim 8 , wherein the at least one module is further adapted to:

prefetch the first block by generating a first prefetch request for the first block; and

prefetch the second block by generating a second prefetch request for the second block.

11. The system of claim 8 , wherein the at least one module is further adapted to generate a single prefetch request for both the first block and the second block.

12. The system of claim 8 , wherein the at least one module is further adapted to:

prefetch the first block by generating a prefetch request for the first block, wherein the prefetch request comprises information regarding where in memory to store the first block; and

store the first block in the memory at a location based, at least in part, on the information regarding where in the memory to store the first block.

13. The system of claim 8 , wherein the first block and the second block form a pair of aligned blocks.

14. The system of claim 8 , wherein, in performing the backward prefetch with respect to the first block, the at least one module is adapted to:

determine the state of a flag corresponding to the first block to determine whether accessing the first block should result in a forward prefetch or a backward prefetch; and

perform the backward prefetch with respect to the first block based, at least in part, on the determined state of the flag.

Assignments (3)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →