IP Library Granted Patent US 7,071,493
Granted Patent B2
US 7,071,493 · App. 11/104,954 · Granted Jul 4, 2006

High density LED array

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Quick Facts
Patent No.
US 7,071,493
App. No.
11/104,954
Granted
Jul 4, 2006
Kind
B2
Abstract

A dense array of semiconductor devices having an array of micro-reflectors, the micro-reflectors having characteristics that enhance dense packing of the array in balance with collection and collimation of the array's radiant output.

Claims (20)

1. A dense array of light emitting semiconductor devices, the array providing radiant output directed to a work piece, the array comprising: a plurality of first micro-reflector elements, each such element having an upper portion, a lower portion and a transition portion disposed between the upper and lower portions, each such element including a packing edge disposed in the upper portion, the packing edge having a perimeter shape, each such element having a basic volumetric form, the cross-section of which volumetric form has a outline that differs from the perimeter shape of the packing edge and wherein, in the transition portion, the cross-section of the volumetric form transitions to provide for the perimeter shape.

2. The dense array of claim 1 , wherein at least one such micro-reflector element has one associated light emitting semiconductor device.

3. The dense array of claim 1 , wherein at least one such micro-reflector element has a plurality of associated light emitting semiconductor devices.

4. The dense array of claim 1 , wherein at least one such micro-reflector element has three light emitting diodes, one such diode emitting in the red spectrum, one emitting in the green spectrum and one emitting in the blue spectrum.

5. The dense array of claim 1 , further comprising coupling optics interposed between the semiconductor devices and the work piece.

6. The dense array of claim 5 , wherein the coupling optics comprise a lens structure.

7. The dense array of claim 1 , wherein the basic volumetric form correlates to a surface of revolution.

8. The dense array of claim 7 , wherein the volumetric form comprises at least one of a parabolic form, a hemispherical form and a conic form.

9. The dense array of claim 7 , wherein the volumetric form is truncated in one or both of the lower or upper portions of the element.

10. The dense array of claim 1 , wherein the basic volumetric form correlates to a polyhedron.

11. The dense array of claim 1 , wherein the transition portion exhibits an immediate, smooth or stepped transition.

12. The dense array of claim 11 , wherein, at the interface between the transition portion and the upper portion, the cross-section of the element has an outline congruent to the perimeter shape of the packing edge.

13. The dense array of claim 1 , further comprising a plurality of second micro-reflector elements, each such second micro-reflector element having an upper portion, a lower portion and a transition portion disposed between the upper and lower portions, each such second micro-reflector element including a packing edge disposed in the upper portion, the packing edge having a perimeter shape, each such second micro-reflector element having a basic volumetric form, the cross-section of which volumetric form has a outline that differs from the perimeter shape of the packing edge and wherein, in the transition portion, the cross-section of the volumetric form transitions to provide for the perimeter shape and, wherein the perimeter shape of the plurality of second micro-reflector elements differs from the perimeter shape of the plurality of first micro-reflector elements.

14. The dense array of claim 13 , wherein the volumetric form of the plurality of second micro-reflector elements differs from the volumetric form of the plurality of first micro-reflector elements.

15. The dense array of claim 13 , wherein the first and second micro-reflector elements are arranged in a pattern thereamong.

16. The dense array of claim 1 , wherein the perimeter shape is a polygon.

17. The dense array of claim 1 , wherein the perimeter shape is a selected type and size, such selection responding to the selection of one or more of additional coupling optics, one or more volumetric forms, the number, size, type of one or more semiconductor devices, the near field radiation pattern of one or more semiconductor devices and the cross-sections of the element in the transition portion, whereby the packing of the array is enhanced in balance with collection and collimation of the radiant output.

18. The dense array of claim 1 , wherein the micro-reflector element includes slots disposed in the lower portion, through which slots coolant flows to directly cool the semiconductor devices.

19. The dense array of claim 1 , wherein the semiconductor device comprises LEDs and each micro-reflector element has associated therewith one or a group of LEDs, which one or group of LEDs are individually or collectively collimated by the micro-reflector element, in which the collimating optical component is reflective and has a reflective surface, which in shape and reflectivity is optimized in relation to the near field emission pattern of the LEDs being collimated.

20. A photoreactive system, the system providing radiant output directed to a work piece in association with a photoreaction, the system comprising: a light emitting subsystem, the light emitting subsystem including a dense array of light emitting semiconductor devices, the array having a plurality of micro-reflector elements, each such element having an upper portion, a lower portion and a transition portion disposed between the upper and lower portions, each such element including a packing edge disposed in the upper portion, the packing edge having a perimeter shape, each such element having a basic volumetric form, the cross-section of which volumetric form has a outline that differs from the perimeter shape of the packing edge and wherein, in the transition portion, the cross-section of the volumetric form transitions to provide for the perimeter shape.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Feb 8, 2023
From: SILICON VALLEY BANK
To: PHOSEON TECHNOLOGY, INC.
Reel/Frame 062687/0618 →
SECURITY INTEREST Recorded Jan 13, 2017
From: PHOSEON TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 041365/0727 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE FROM ASSIGNMENT TO SECURITY AGREEMENT PREVIOUSLY RECORDED ON REEL 026504 FRAME 0270. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF THE SECURITY INTEREST. Recorded Aug 14, 2012
From: PHOSEON TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 028782/0457 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2011
From: PHOSEON TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 026504/0270 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2005
From: OWEN, MARK D.; ANDERSON, DUWAYNE R.
To: PHOSEON TECHNOLOGY, INC.
Reel/Frame 016559/0932 →