Method and apparatus for facilitating faster execution of code on a memory-constrained computing device

1. A method for facilitating faster execution of code and garbage collection on a memory-constrained computing device that has fast on-chip RAM, wherein the fast on-chip RAM is located on a processor chip, but is not cache memory, comprising:

copying a compiled method from an object heap to a fast on-chip RAM on the memory-constrained computing device; and

updating an execution pointer to point to the compiled method in the fast on-chip RAM, wherein the execution pointer otherwise points to a compiled method in the object heap or an interpreted method in the object heap, and

wherein the execution pointer is updated by setting a virtual table entry; and

performing a garbage-collection operation by:

clearing the contents of the fast on-chip RAM, wherein clearing the contents of the fast on-chip RAM involves deleting all compiled methods from the fast on-chip RAM, but retaining the compiled methods in the object heap;

examining the object heap for one or more execution pointers that point to compiled methods in the fast on-chip RAM that were deleted from the fast on-chip RAM during the clearing operation; and

if one or more execution pointers are found,

copying the compiled methods pointed to by the one or more execution pointers from the object heap to the fast on-chip RAM, wherein the compiled methods may be copied to new locations in the fast on-chip RAM, and

updating the one or more execution pointers to point to the compiled methods in the fast on-chip RAM.

2. The method of claim 1 , wherein during a garbage-collection operation, the method further comprises:

clearing the contents of the fast on-chip RAM; and

updating the execution pointer to point to the compiled method in the object heap.

3. The method of claim 1 , wherein performing a garbage-collection operation further comprises updating a pointer in a compiled method in the fast on-chip RAM to point to a location of an object in the object heap, wherein pointers in the compiled methods in the fast on-chip RAM are updated but the compiled methods are not relocated.

4. The method of claim 1 , wherein a compiled method is copied to the fast on-chip RAM only if the compiled method is smaller than a predetermined size.

5. The method of claim 1 , further comprising:

ranking all compiled methods in the object heap in order of execution; and

copying compiled methods with rankings above a predetermined threshold to the fast on-chip RAM.

6. The method of claim 1 , wherein the copying of compiled methods to the fast on-chip RAM only occurs during a garbage-collection operation.

7. The method of claim 1 , wherein the processor is an ARM processor.

8. The method of claim 1 , wherein the fast on-chip RAM has a one cycle access time.

9. An apparatus for facilitating faster execution of code and garbage collection on a memory-constrained computing device that has fast on-chip RAM, wherein the fast on-chip RAM is located on a processor chip, but is not cache memory, comprising:

a copying mechanism configured to copy a compiled method from an object heap to the fast on-chip RAM on the memory-constrained computing device; and

an updating mechanism configured to update an execution pointer to point to the compiled method in the fast on-chip RAM, wherein the execution pointer otherwise points to a compiled method in the object heap or an interpreted method in the object heap, and wherein the execution pointer is updated by setting a virtual table entry;

a garbage-collection mechanism configured to perform a garbage-collection operation, wherein the garbage collection mechanism includes:

a clearing mechanism configured to clear the contents of the fast on-chip RAM, wherein clearing the contents of the fast on-chip RAM involves deleting all compiled methods from the fast on-chip RAM, but retaining the compiled methods in the object heap;

an examination mechanism configured to examine the object heap for one or more execution pointers that point to the compiled method in the fast on-chip RAM that were deleted from the fast on-chip RAM during the clearing operation;

a copying mechanism configured to copy the compiled methods pointed to by the one or more execution pointers from the object heap to the fast on-chip RAM, wherein the compiled methods may be copied to new locations in the fast on-chip RAM; and

an updating mechanism configured to update the one or more execution pointers to point to the corresponding compiled methods in the fast on-chip RAM.

10. The apparatus of claim 9 , further comprising:

a clearing mechanism configured to clear the contents of the fast on-chip RAM;

wherein the updating mechanism is further configured to update the execution pointer to point to the compiled method in the object heap; and

wherein the apparatus is configured to operate during a garbage-collection operation.

11. The apparatus of claim 9 , wherein during a garbage collection operation the updating mechanism is further configured to update a pointer in a compiled method in the fast on-chip RAM to point to a location of an object in the object heap, wherein pointers in the compiled methods in the fast on-chip RAM are updated but the compiled methods are not relocated.

12. The apparatus of claim 9 , wherein the copying mechanism is further configured to copy a compiled method to the fast on-chip RAM only if the compiled method is smaller than a predetermined size.

13. The apparatus of claim 9 , further comprising:

a ranking mechanism configured to rank all compiled methods in the object heap in order of execution; and

wherein the copying mechanism is further configured to copy compiled methods with rankings above a predetermined threshold to the fast on-chip RAM.

14. The apparatus of claim 9 , wherein the copying mechanism is further configured to copy compiled methods to the fast on-chip RAM during a garbage-collection operation.

15. The apparatus of claim 9 , wherein the processor is an ARM processor.

16. The apparatus of claim 9 , wherein the fast on-chip RAM has a one cycle access time.

17. A computing system with a mechanism for facilitating faster execution of code and garbage collection, comprising:

a processor located on a processor chip;

a fast on-chip RAM which is located on the processor chip, but is not cache memory;

a copying mechanism configured to copy a compiled method from an object heap to the fast on-chip RAM on the memory-constrained computing device; and

an updating mechanism configured to update an execution pointer to point to the compiled method in the fast on-chip RAM, wherein the execution pointer otherwise points to a compiled method in the object heap or an interpreted method in the object heap;

a garbage-collection mechanism configured to perform a garbage-collection operation, wherein the garbage collection mechanism includes:

a clearing mechanism configured to clear the contents of the fast on-chip RAM, wherein clearing the contents of the fast on-chip RAM involves deleting all compiled methods from the fast on-chip RAM, but retaining the compiled methods in the object heap;

an examination mechanism configured to examine the object heap for one or more execution pointers that point to the compiled method in the fast on-chip RAM that were deleted from the fast on-chip RAM during the clearing operation;

a copying mechanism configured to copy the compiled methods pointed to by the one or more execution pointers from the object heap to the fast on-chip RAM, wherein the compiled methods may be copied to new locations in the fast on-chip RAM; and

an updating mechanism configured to update the one or more execution pointers to point to the corresponding compiled methods in the fast on-chip RAM.