IP Library Granted Patent US 7,675,351
Granted Patent B2
US 7,675,351 · App. 11/107,905 · Granted Mar 9, 2010

Frequency output circuit

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Quick Facts
Patent No.
US 7,675,351
App. No.
11/107,905
Granted
Mar 9, 2010
Kind
B2
Abstract

Unwanted electromagnetic waves are eliminated in a frequency output circuit comprising an open-collector output terminal whereby radio noise can be reduced. A frequency output circuit 10 comprises an open-collector transistor Q 4 with an open-collector output terminal connected to a pull-up resistor Rf connected to an external power supply Vex. A current limiting circuit 16 limits a current through the output terminal such that a high potential and a low potential of the output waveform of a frequency signal outputted by an output circuit 12 are smoothly switched. The current limiting circuit 16 is formed by a differential pair circuit of transistors Q 1 and Q 2 each with a resistor provided in the emitter thereof, and a current mirror circuit comprising an open-collector transistor, for example.

Claims (11)

1. A frequency output circuit comprising an output circuit that outputs a rectangular wave signal, and an open-collector transistor whose collector is an output terminal, the collector being connected to a pull-up resistor connected to an external power supply, the output terminal outputting a frequency signal with the same frequency as a frequency of a signal outputted from the output circuit, and the frequency output circuit further comprising:

a current limiting circuit for limiting a current that flows through the output terminal such that a high potential and a low potential of an output waveform outputted via the output terminal are smoothly switched,

wherein the current limiting circuit comprises:

a differential pair circuit having a first transistor with a resistor provided to the emitter thereof, and a second transistor with a resistor provided to the emitter thereof;

a third transistor that forms a current mirror circuit with the open-collector transistor, the third transistor being connected to the collector of one of the first transistor and the second transistor; and

a constant current source configured to distribute currents to the first transistor and the second transistor through the resistors that are connected to the emitters of the first transistor and the second transistor respectively, based on a difference between the input signal inputted to the base of the first transistor and an input signal inputted to the base of the second transistor.

2. The frequency output circuit according to claim 1 , wherein the transistors forming the current mirror circuit in the current limiting circuit each have an adjusting resistor connected to the emitter thereof.

3. The frequency output circuit according to claim 1 , wherein signals inputted to the differential pair circuit of the current limiting circuit comprise a triangular wave voltage signal with the same frequency as that of an output signal, and a constant voltage signal with a value between a maximum voltage value and a minimum voltage value of the triangular wave.

4. The frequency output circuit according to claim 1 , wherein signals inputted to the differential pair circuit of the current limiting circuit comprise two kinds of triangular wave voltage signals with the same frequency as that of an output signal and with different amplitudes.

5. The frequency output circuit according to claim 1 , wherein the differential pair circuit of the current limiting circuit comprises a low-pass filter formed by a capacitor and a resistor at a signal input terminal thereof.

6. The frequency output circuit according to claim 1 , further comprising another pull-up resistor connected to the open-collector output terminal and also connected to an internally provided reference power supply.

Assignments (3)
CHANGE OF NAME Recorded Nov 30, 2021
From: HITACHI AUTOMOTIVE SYSTEMS, LTD.
To: HITACHI ASTEMO, LTD.
Reel/Frame 058481/0935 →
DEMERGER Recorded Nov 29, 2021
From: HITACHI, LTD.
To: HITACHI AUTOMOTIVE SYSTEMS, LTD.
Reel/Frame 058960/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2007
From: ANDO, RYO
To: HITACHI, LTD.
Reel/Frame 019739/0897 →