Trim circuits and methodologies for data converters
View Patent ↗An improved digital-to-analog converter comprises a reference node, switches providing an input digital signal, and an output stage including at least one resistive element. A resistance ladder, coupled to the switches, includes branches corresponding respectively to bit positions, in which selective operation of the switches in response to the input digital signal produces a corresponding analog output signal from the output stage. The ladder includes a first trim structure coupled to the most significant bit position (MSB) and a second trim structure in the output stage resistive element or elements. The first trim structure is configured to adjust the gain of the converter without affecting the relative bit weights of the bit positions, and wherein the resistances of the first and second trim structures are substantially of a prescribed ratio prior to any trimming.
1. A digital-to-analog converter, comprising
at least one input node;
switches providing an input digital signal;
an output stage including at least one resistive element;
a resistance ladder coupled to the switches, the ladder including branches corresponding respectively to bit positions, in which selective operation of the switches in response to the input digital signal produces a corresponding analog output signal from the output stage;
a first trim structure coupled to the most significant bit position (MSB) of the resistance ladder; and
a second trim structure in the output stage resistive element, and N additional trim structures (N=0, 1, 2, 3, . . . ), wherein the first trim structure is configured to adjust the gain of the digital-to-analog converter without affecting the relative bit weights of the bit positions, and wherein the resistances of the first, second and any additional trim structures, respectively, are substantially of a prescribed ratio prior to any trimming.
2. A digital-to-analog converter as recited in claim 1 , in which the output stage comprises an amplifier.
3. A digital-to-analog converter as recited in claim 2 , in which the second trim structure resides in a feedback circuit of the amplifier.
4. A digital-to-analog converter as recited in claim 1 , in which the output stage comprises a current-to-voltage converter.
5. A digital-to-analog converter as recited in claim 4 , in which the second trim structure resides in a feedback resistor of the current-to-voltage converter.
6. The digital-to-analog converter as recited in claim 1 , wherein part or all of the digital-to-analog converter is of an R-2R resistance ladder configuration.
7. The digital-to-analog converter as recited in claim 1 , wherein part or all of the digital-to-analog converter is of segmented resistance ladder configuration.
8. The digital-to-analog converter as recited in claim 1 , in which the trim structures are laser-trimmable.
9. The digital-to-analog converter as recited in claim 1 , wherein the trim structures are fuse trimmable.
10. The digital-to-analog converter as recited in claim 1 , wherein the value of some or all of the trim structures are under the control of a digital signal.
11. The digital-to-analog converter as recited in claim 1 , in which the converter is unipolar.
12. The digital-to-analog converter as recited in claim 1 , in which the converter is bipolar and comprises 3 or more trim structures wherein at least one trim structure is coupled to an offset resistive element.
13. The digital-to-analog converter as recited in claim 1 , in which the digital-to-analog converter is of a Softspan™ unipolar configuration comprising 3 or more trim structures, wherein one or more trim structures are coupled to respective output stage resistive elements.
14. The digital-to-analog converter as recited in claim 1 , in which the digital-to-analog converter is of a Softspan™ bipolar configuration comprising 4 or more trim structures, wherein one or more trim structures is coupled to an offset resistive element and 2 or more trim structures are coupled to respective output stage resistive elements.
15. In a digital-to-analog converter of a type comprising at least one input node; switches providing an input digital signal; an output stage including at least one resistive element; a resistance ladder coupled to the switches, the ladder including branches corresponding respectively to bit positions, in which selective operation of the switches in response to the input digital signal produces a corresponding analog output signal from the output stage, a method of trimming the converter implements a first trim structure coupled to the most significant bit position (MSB) of the resistance ladder, and a second trim structure in the output stage resistive element, in which there may be included N additional trim structures (N=0, 1, 2, 3, . . . ), wherein the method comprises:
trimming the first trim structure to adjust the gain of the digital-to-analog converter by which the relative bit weights of the bit positions are not affected, and wherein the resistances of the first, second and any additional trim structures, respectively, are substantially of a prescribed ratio prior to any trimming.