IP Library Granted Patent US 7,081,844
Granted Patent B1
US 7,081,844 · App. 11/112,065 · Granted Jul 25, 2006

Devices and methods for converting a digital signal into an analog signal

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Quick Facts
Patent No.
US 7,081,844
App. No.
11/112,065
Granted
Jul 25, 2006
Kind
B1
Abstract

There is provided a digital to an analog converter (DAC) comprising a current source, a first logic circuit, wherein the first logic circuit receives a first switching signal and a low-power mode signal, a first switch controlled by the first logic circuit, wherein the first switch selectively couples the current source to a ground in response to a signal from the first logic circuit, and a second switch controlled by a second switching signal, wherein the second switch selectively couples the current source to a load in response to the second switching signal. The first switching signal and the second switching signal may be complementary and are based on a digital signal that is being converted into an analog signal. The low-power mode signal is provided to selectively switch the DAC into a lower power consumption mode.

Claims (30)

1. A digital to an analog converter (DAC) comprising:

a current source;

a first logic circuit, wherein the first logic circuit receives a first switching signal and a low-power mode signal, wherein when the low-power mode signal is enabled, the DAC consumes less power than when the low-power mode signal is disabled;

a first switch controlled by the first logic circuit, wherein the first switch selectively couples the current source to a ground in response to a signal from the first logic circuit; and

a second switch controlled by a second switching signal, wherein the second switch selectively couples the current source to a load in response to the second switching signal.

2. The DAC of claim 1 , wherein the current source comprises a transistor.

3. The DAC of claim 1 , wherein the first switch and the second switch each comprise a transistor.

4. The DAC of claim 1 , wherein the first switching signal and the second switching signal are based on a digital signal that is being converted into an analog signal.

5. The DAC of claim 1 , wherein the first switching signal and the second switching signal are complementary.

6. The DAC of claim 1 , wherein the low-power mode signal is selectively enabled or disabled to change the DAC power consumption.

7. The DAC of claim 1 , wherein a first buffer circuit couples the first switch to the ground, and wherein a second buffer circuit couples the second switch to the load.

8. A digital to an analog converter (DAC) comprising:

means for generating a current;

a first means for selectively switching the current to a ground in response to a first switching signal and a low-power mode signal, wherein when the low-power mode signal is enabled, the DAC consumes less power than when the low-power mode signal is disabled; and

a second means for selectively switching the current to a load in response to a second switching signal.

9. The DAC of claim 8 , wherein the first switching signal and the second switching signal are based on a digital signal that is being converted into an analog signal.

10. The DAC of claim 8 , wherein the first switching signal and the second switching signal are complementary.

11. The DAC of claim 8 , wherein the low-power mode signal is selectively enabled or disabled to change the DAC power consumption.

12. The DAC of claim 8 , wherein the first means is coupled to the ground through a first buffer means, and wherein the second means is coupled to the load through a second buffer means.

13. A method of converting a digital signal into an analog signal using a digital to an analog converter (DAC), the method comprising:

generating a current;

selectively switching the current to a ground based on a first switching signal and a low-power mode signal, wherein when the low-power mode signal is enabled, the DAC consumes less power than when the low-power mode signal is disabled; and

selectively switching the current to a load based on a second switching signal.

14. The method of claim 13 , wherein the current is generated using a transistor.

15. The method of claim 13 , wherein the first switching signal and the second switching signal are based on the digital signal that is being converted into the analog signal.

16. The method of claim 13 , wherein the first switching signal and the second switching signal are complementary.

17. The method of claim 13 , further comprising selectively enabling or disabling the low-power mode signal to change the DAC power consumption.

18. The method of claim 13 , wherein the selectively switching the current to the ground is performed using a first transistor and the selectively switching the current to the load is performed using a second transistor.

19. The method of claim 18 , wherein the first transistor is coupled to the ground through a first buffer circuit, and wherein the second transistor is coupled to the load through a second buffer circuit.

20. The method of claim 19 , wherein the first buffer circuit and the second buffer circuit each comprise a transistor.

Assignments (1)
SECURITY AGREEMENT Recorded Jul 9, 2008
From: ESS TECHNOLOGY, INC.
To: THE PRIVATE BANK OF THE PENINSULA
Reel/Frame 021212/0413 →