IP Library Granted Patent US 7,420,405
Granted Patent B2
US 7,420,405 · App. 11/112,426 · Granted Sep 2, 2008

Electronic isolator

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Quick Facts
Patent No.
US 7,420,405
App. No.
11/112,426
Granted
Sep 2, 2008
Kind
B2
Abstract

The present invention is an electronic isolator that provides low input to output insertion loss, high output to input insertion loss, and substantial asymmetric isolation between a source circuit and a load circuit. The invention actively reduces noise and reflected power appearing on the isolator output. In numerous embodiments, the invention operates in circuit applications from dc through millimeter wave. Multistage electronic isolator embodiments provide increased isolation and greater noise reduction. In other embodiments, the electronic isolator also removes noise appearing on its input. In another embodiment, the invention is configured for high power applications. This embodiment includes circuitry for redirecting power away from the load into resistors or other dissipative elements. In another embodiment, the electronic isolator is configured to remove signal distortion produced by one or more power amplifiers in the system.

Claims (11)

1. An electronic isolator between a source stage and a load stage comprising: an electrical input comprising at least one source electrical connection connected to the source stage,

a no insertion gain electrical output comprising at least one load electrical connection to the load stage, at least one isolator circuit path into which electrical noise is directed away from the source and load electrical connections;

in which insertion loss of said electronic isolator is dependent upon the direction of signal and noise transmission through said electronic isolator.

2. The electronic isolator of claim 1 wherein at least one of the input and the output comprise circuit structures providing the function of series, direct current blocking capacitors.

3. The electronic isolator of claim 1 wherein said electrical input and said electrical output comprise a plurality of conductors not using ground signal return paths.

4. The electronic isolator of claim 3 wherein said electrical input and said electrical output comprise groups of three conductors each conducting three phase delta configuration signals.

5. The electronic isolator of claim 1 further including attenuation circuit networks including at least one T-configuration network.

6. The electronic isolator of claim 5 wherein said attenuation circuit networks include at least one Pi-configuration network.

7. The electronic isolator of claim 5 wherein said attenuation circuit networks include at least one Bridged-T-configuration network.

8. The electronic isolator of claim 5 wherein said attenuation circuit networks include at least one lattice configuration network.

9. The electronic isolator of claim 5 wherein said attenuation circuit networks include said circuit paths into which said electrical noise is redirected.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2016
From: CMW TECHNOLOGY, LLC
To: MASHHOON, HAMID R
Reel/Frame 039617/0915 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2011
From: WASHBURN, ROBERT D.; MCCLANAHAN, ROBERT F.
To: CMW TECHNOLOGY
Reel/Frame 025944/0751 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2008
From: THUNDER CREATIVE TECHNOLOGIES, INC.
To: WASHBURN, ROBERT D.; MCCLANAHAN, ROBERT F.
Reel/Frame 021411/0128 →