IP Library Granted Patent US 7,751,717
Granted Patent B2
US 7,751,717 · App. 11/114,982 · Granted Jul 6, 2010

Host printed circuit board with multiple optical transceivers

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Quick Facts
Patent No.
US 7,751,717
App. No.
11/114,982
Granted
Jul 6, 2010
Kind
B2
Abstract

An optical transceiver host computing system (hereinafter simply referred as the “host”) printed circuit board has multiple optical transceivers directly mounted to it. Each optical transceiver is configured to convert an electrical signal into an optical signal and to transmit the optical signal and to receive an optical signal and convert the received signal into an electrical signal. By directly mounting the optical transceivers to the host printed circuit board, an increased number of transceivers may be supported by a single host without increasing the overall size of the host.

Claims (55)

1. A host computing system comprising:

an optical transceiver host printed circuit board including an electrical connection that is connected to a dedicated module connection in the host, the optical transceiver host printed circuit board including:

a first optical transceiver, wherein the first optical transceiver comprises:

a first electro-optic transducer driver;

a first electro-optic transducer coupled to the first electro-optic transducer driver so as to receive an electrical signal from the first electro-optic transducer driver and convert the received electrical signal into an optical signal;

a first optoelectronic transducer configured during operation to convert a received optical signal into a corresponding received electrical signal; and

a first post-amplifier coupled to the first optoelectronic transducer so as to amplify the received electrical signal; and

a second optical transceiver, wherein the second optical transceiver comprises:

a second electro-optic transducer driver;

a second electro-optic transducer coupled to the second electro-optic transducer driver so as to receive an electrical signal from the second electro-optic transducer driver and convert the received electrical signal into an optical signal;

a second optoelectronic transducer configured during operation to convert a received optical signal into a corresponding received electrical signal; and

a second post-amplifier coupled to the second optoelectronic transducer so as to amplify the received electrical signal;

wherein the first and second optical transceivers are directly mounted to the host printed circuit board; and

wherein the first and second optical transceivers do not implement a separate encasing from one another;

a first control module configured to control the operation of the first electro-optic transducer driver and the first post-amplifier;

a second control module configured to control the operation of the second electro-optic transducer driver and the second post-amplifier;

a microprocessor that is directly mounted to the printed circuit board configured to at least partially control the first and second optical transceivers by providing different operational microcode to the first and second control modules; and

a logic device directly mounted to the host printed circuit board, wherein the logic device is configured to direct communication from the microprocessor to the first control module such that the second control modules does not receive the communication; and direct communication from the microprocessor to the second control module such that the first control module does not receive the communication.

2. A host computing system in accordance with claim 1 , wherein a single control module is used to control the first and second optical transceivers.

3. A host computing system in accordance with claim 1 , wherein the first optical transceiver further comprises:

a first persistent memory directly mounted to the printed circuit board, wherein the persistent memory is coupled to the first control module.

4. A host computing system in accordance with claim 3 , wherein the first post-amplifier, the first electro-optic transducer driver, the first persistent memory, and the first control module are integrated on a single chip.

5. A host computing system in accordance with claim 3 , wherein the first post-amplifier, the first electro-optic transducer driver, the first persistent memory, and the first control module are integrated on separate chips.

6. A host computing system in accordance with claim 3 , wherein the first persistent memory and the first control module are integrated on a single chip.

7. A host computing system in accordance with claim 3 , wherein the first persistent memory and the first control module are on separate chips.

8. A host computing system in accordance with claim 1 , wherein the first post-amplifier and the first control module are integrated on a single chip.

9. A host computing system in accordance with claim 1 , wherein the first post-amplifier and the first control module are on separate chips.

10. A host computing system in accordance with claim 1 , wherein the first electro-optic transducer driver and the first control module are integrated on a single chip.

11. A host computing system in accordance with claim 1 , wherein the first electro-optic transducer driver and the first control module are on separate chips.

12. A host computing system in accordance with claim 1 , wherein the first post-amplifier, the first electro-optic transducer driver, and the first control module are integrated on a single chip.

13. A host computing system in accordance with claim 1 , wherein the first post-amplifier, the first electro-optic transducer driver, and the first control module are integrated on separate chips.

14. A host computing system in accordance with claim 1 , wherein at least one of the first and second electro-optic transducers is one of a laser or a Light Emitting Diode (LED).

15. A host computing system in accordance with claim 1 , wherein the first post-amplifier and the first electro-optic transducer driver are integrated on a single chip.

16. A host computing system in accordance with claim 1 , wherein the first post-amplifier and the first electro-optic transducer driver are on separate chips.

17. A host computing system an according with claim 1 , wherein the logic device is a Field Programmable Gate Array.

18. A host computing system in accordance with claim 1 , wherein the first optical transceiver is one of a 1G laser transceiver, a 2G laser transceiver, a 4G laser transceiver, a 8G laser transceiver, a 10G laser transceiver, or a laser transceiver suitable for fiber optic links greater than 10G.

19. A host computing system in accordance with claim 1 , wherein the first optical transceiver is one of a XFP laser transceiver, a SFP laser transceiver, or a SFF laser transceiver.

20. A host printed circuit board in accordance with claim 1 , wherein the operational microcode causes the first and second optical transceivers to perform different diagnostic operations of operational parameters.

21. An optical transceiver host printed circuit board comprising:

a first optical transceiver, wherein the first optical transceiver comprises:

a first electro-optic transducer driver;

a first electro-optic transducer coupled to the first electro-optic transducer driver so as to receive an electrical signal from the first electro-optic transducer driver and convert the received electrical signal into an optical signal;

a first optoelectronic transducer configured during operation to convert a received optical signal into a corresponding received electrical signal; and

a first post-amplifier coupled to the optoelectronic transducer so as to amplify the received electrical signal; and

a first control module configured to control the operation of the first electro-optic transducer driver and the first post-amplifier, the first control module comprising: at least one first sensor, a first analog-to-digital converter, at least one first processor, a first system memory, and a first input/output multiplexer;

a second optical transceiver, wherein the second optical transceiver comprises:

a second electro-optic transducer driver;

a second electro-optic transducer coupled to the second electro-optic transducer driver so as to receive an electrical signal from the second electro-optic transducer driver and convert the received electrical signal into an optical signal;

a second optoelectronic transducer configured during operation to convert a received optical signal into a corresponding received electrical signal; and

a second post-amplifier coupled to the optoelectronic transducer so as to amplify the received electrical signal; and

a second control module configured to control the operation of the second electro-optic transducer driver and the second post-amplifier, the second control module comprising: at least one second sensor, a second analog-to-digital converter, at least one second processor, a second system memory, and a second input/output multiplexer;

wherein the first and second optical transceivers are directly mounted to the host printed circuit board in a side-by side adjacent configuration, and wherein the first and second optical transceivers do not implement individual casings for each optical transceiver; and

an FPGA directly mounted to host printed circuit board, wherein the FPGA is configured to:

direct communication from a host microprocessor to the first control module such that the second control module does not receive the communication; and

direct communication from the host microprocessor to the second control module such that the first control module does not receive the communication.

Assignments (4)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →