Filtering digital diagnostics information in an optical transceiver prior to reporting to host
View Patent ↗An optical transceiver configured to perform filtering of digital diagnostics prior to the filtered results being made accessible to a host computing system (hereinafter referred to simply as a “host”) that is communicatively coupled to the optical transceiver. The optical transceiver includes sensor(s) that measures analog operational parameter signals such as temperature and supply voltage. The analog signals are each converted to a plurality of digital samples by analog to digital converter(s). A processor executes microcode that causes the optical transceiver to perform filtering on the various samples. The optical transceiver may then make the filtered result accessible to the host.
1. In an optical transceiver that is communicatively couplable to a host computing system, the optical transceiver including a system memory and a processor, a method for the optical transceiver to filter digital diagnostics information prior to communicating with the host computing system, the method comprising the following:
obtaining a first plurality of samples from a first analog signal, wherein the first analog signal is generated by an analog sensor included in a control module, the control module additionally including the processor;
loading microcode to the system memory; and
executing the microcode using the processor to thereby cause the optical transceiver to filter the first plurality of samples,
wherein the first analog signal is a transceiver temperature signal; and
wherein the control module further includes:
a multiplexer coupled to the analog sensor and configured to select a single one of multiple analog signals for sampling, the multiple analog signals including the first analog signal;
an Analog to Digital Converter (ADC) coupled to the multiplexer and configured to sample the selected signal and generate a corresponding digital signal for use by a digital portion of the control module;
a plurality of processors including the processor that executes the microcode;
a controller system memory;
a memory controller configured to share access to the controller system memory amongst each of the plurality of processors;
a two-wire host communications interface configured to allow communication between the control module and the host computing system; and
an input-output multiplexer configured to multiplex various input/output pins of the control module to various nodes within the control module, wherein a number of the nodes in the control module exceeds a number of the input/output pins.
2. A method in accordance with claim 1 , wherein executing the microcode using the processor to thereby cause the optical transceiver to filter the first plurality of samples comprises:
adding the first plurality of samples together to produce a sum; and
dividing the sum by the number of samples added together to produce a filtered result.
3. A method in accordance with claim 1 , wherein the optical transceiver filters the first plurality of samples by use of an Infinite Impulse Response (IIR) filter.
4. A method in accordance with claim 1 , wherein the optical transceiver filters the first plurality of samples by use of a Finite Impulse Response (FIR) filter.
5. A method in accordance with claim 1 , wherein the optical transceiver is one of a 1G laser transceiver, a 2G laser transceiver, a 4G laser transceiver, an 8G laser transceiver, or a 10G laser transceiver.
6. A method in accordance with claim 1 , wherein the optical transceiver is one of a XFP laser transceiver, a SFP laser transceiver, or a SFF laser transceiver.
7. A method in accordance with claim 1 , further comprising:
obtaining a second plurality of samples from a second analog signal,
wherein executing the microcode further causes the optical transceiver to filter the second plurality of samples, and wherein the second analog signal is one of a transceiver supply voltage signal, a laser bias current signal, a transceiver receive power signal, or a transceiver transmit power signal.
8. An optical transceiver comprising the following:
an optical transmitter;
a laser driver coupled to the optical transmitter and configured to drive the optical transmitter to emit a first optical signal representative of a first electrical signal received from a host computing system;
an optical receiver configured to receive a second optical signal and generate a second electrical signal representative of the second optical signal;
a post-amplifier coupled to the optical receiver and configured to amplify the second electrical signal for transmission to the host computing system; and
a control module communicatively coupled to the laser driver and the post-amplifier and configured to adjust settings on the post-amplifier and the laser driver, wherein the control module comprises:
an analog sensor;
at least one processor;
an analog to digital converter configured to obtain a first plurality of samples from a first analog signal generated by the analog sensor; and
a system memory having thereon microcode, wherein the microcode is structured such that, when executed by the at least one processor, the optical transceiver is caused to access the first plurality of samples and to perform a filtering operation on the first plurality of samples to generate a first filtered value,
wherein the first analog signal is a transceiver temperature signal.
9. An optical transceiver in accordance with claim 8 , wherein performing the filtering operation comprises adding the first plurality of samples together to produce a sum and dividing the sum by the number of samples added together to produce the first filtered value.
10. An optical transceiver in accordance with claim 8 , wherein performing the filtering operation comprises use of an Infinite Impulse Response (IIR) filter.
11. An optical transceiver in accordance with claim 8 , wherein performing the filtering operation comprises use of a Finite Impulse Response (FIR) filter.
12. An optical transceiver in accordance with claim 8 , wherein the optical transceiver is one of a 1G laser transceiver, a 2G laser transceiver, a 4G laser transceiver, an 8G laser transceiver, or a 10G laser transceiver.
13. An optical transceiver in accordance with claim 8 , wherein the optical transceiver is a laser transceiver suitable for fiber optic links greater than 10G.
14. A system comprising the optical transceiver of claim 8 and the host computing system coupled to the optical transceiver of claim 8 .
15. An optical transceiver in accordance with claim 8 , wherein the transceiver is adapted to log the first filtered result to the host computing system.
16. The method in accordance with claim 1 , further comprising: making the filtered result accessible to the host computing system.
17. A method in accordance with claim 16 , wherein making the filtered result accessible to the host computing system includes responding to a poll from the host computing system for the filtered result.
18. An optical transceiver in accordance with claim 8 , wherein:
the analog to digital converter is further configured to obtain a second plurality of samples from a second analog signal,
the microcode is further structured such that, when executed by the at least one processor, the optical transceiver is caused to access the second plurality of samples and to perform a filtering operation on the second plurality of samples to generate a second filtered value, and
the second analog signal is one of a transceiver supply voltage signal, a laser bias current signal, a transceiver receive power signal, or a transceiver transmit power signal.
19. The optical transceiver of claim 8 , wherein the control module further comprises:
a multiplexer coupled to the analog sensor and configured to select a single one of multiple analog signals for sampling, the multiple analog signals including the first analog signal;
an Analog to Digital Converter (ADC) coupled to the multiplexer and configured to sample the selected signal and generate a corresponding digital signal for use by a digital portion of the control module;
a plurality of processors including the processor that executes the microcode;
a controller system memory;
a memory controller configured to share access to the controller system memory amongst each of the plurality of processors;
a two-wire host communications interface configured to allow communication between the control module and the host computing system; and
an input-output multiplexer configured to multiplex various input/output pins of the control module to various nodes within the control module, wherein a number of the nodes in the control module exceeds a number of the input/output pins.