Method of manufacturing thin film transistor having polycrystalline silicon layer, thin film transistor manufactured using the method and flat panel display comprising the thin film transistor
View Patent ↗A method for manufacturing a thin film transistor having a more uniform threshold voltage, and a flat panel display device that includes the thin film transistor. The method includes forming an amorphous silicon film on a substrate, removing a silicon oxide layer from a surface of the amorphous silicon film, forming a silicon oxide layer on the surface of the amorphous silicon film, and forming a polycrystalline Si layer by crystallizing the amorphous silicon film.
1. A method for manufacturing a thin film transistor, comprising:
forming an amorphous silicon film on a substrate;
removing contaminants on a first silicon oxide layer on a surface of the amorphous silicon film;
removing the first silicon oxide layer from the surface of the amorphous silicon film using a fluoric acid solution after removing contaminants on the first silicon oxide layer;
forming a second silicon oxide layer on the surface of the amorphous silicon film; and
forming a polycrystalline silicon layer by crystallizing the amorphous silicon film,
wherein the fluoric acid solution has a concentration of about 0.1 wt % to about 0.7 wt %.
2. The method of claim 1 , wherein the step of removing the first silicon oxide layer is performed for about 80 seconds to about 200 seconds.
3. The method of claim 1 , wherein forming the second silicon oxide layer comprises using ozone water.
4. The method of claim 3 , wherein the ozone water has a concentration of about 0.0001 wt % to about 5 wt %.
5. The method of claim 1 , wherein the step of forming the second silicon oxide layer is performed for more than about 100 seconds.
6. The method of claim 1 , wherein the amorphous silicon film is crystallized using an excimer laser annealing method.
7. The method of claim 1 , wherein removing contaminants on the first silicon oxide layer comprises washing the first silicon oxide layer with ozone water.
8. A thin film transistor manufactured according to the method of claim 1 , comprising:
an active layer formed by patterning the polycrystalline silicon layer;
a gate electrode insulated from the active layer; and
a source electrode and a drain electrode coupled with the active layer.
9. The thin film transistor of claim 8 , wherein an absolute value of a PMOS threshold voltage of the thin film transistor is equal to or less than about 1.00V, and a standard deviation of the threshold voltage is less than about 0.13V.
10. A flat panel display device comprising a plurality of pixels, wherein a pixel includes:
the thin film transistor of claim 9 , and
a pixel electrode coupled with one of the source electrode and the drain electrode of the thin film transistor.