IP Library Granted Patent US 7,694,300
Granted Patent B2
US 7,694,300 · App. 11/118,684 · Granted Apr 6, 2010

Inter-process interference elimination

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Quick Facts
Patent No.
US 7,694,300
App. No.
11/118,684
Granted
Apr 6, 2010
Kind
B2
Abstract

Described herein is an implementation of a technology for the construction, identification, and/or optimization of operating-system processes. At least one implementation, described herein, constructs an operating-system process having the contents as defined by a process manifest. Once constructed, the operating-system process is unalterable.

Claims (30)

1. A computer configured with an operating system, the computer comprising:

a processor configured to execute processor-executable instruction streams of one or more operating-system processes;

a memory configured to hold one or more operating-system processes as the processor-executable instruction streams of the one or more processes are executed by a processor;

an inter-process interference eliminator configured to:

analyze the processor-executable instruction stream of a subject operating-system process, which is one of the one or more operating-system processes, to determine if the subject process, when executed, has a potential to interfere with another executing process in the memory;

in response to a determination that the subject process, when executed, has the potential to interfere with another executing process in the memory, adjust the processor-executable instruction stream of the subject process to eliminate that potential interference,

wherein the processor is configured to concurrently address memory holding two or more operating-system processes as the processor-executable instruction streams of the two or more processes are executed by a processor.

2. A computer as recited in claim 1 , wherein the inter-process interference eliminator is further configured to perform the adjustment a priori execution of the processor-executable instruction stream of the subject process.

3. A computer as recited in claim 1 , wherein the inter-process interference eliminator is further configured to perform the adjustment during execution of the processor-executable instruction stream of the subject process.

4. A computer as recited in claim 1 , wherein the concurrently addressing memory holding two or more operating-system processes is based on a run-time or administrative policy.

5. A computer as recited in claim 1 , wherein the inter-process interference eliminator is further configured to perform the analysis a priori execution of the processor-executable instruction stream of the subject process.

6. A computer as recited in claim 1 , wherein the inter-process interference eliminator is further configured to perform the analysis during execution of the processor-executable instruction stream of the subject process.

7. A computer as recited in claim 1 , wherein one or more actions that adjust the processor-executable instruction stream of the subject process to eliminate that potential interference comprise modifying the processor-executable instruction stream of the subject process.

8. A computer as recited in claim 7 , wherein the processor-executable instruction steam is modified to maintain the property of type safety.

9. One or more computer storage media having processor-executable instructions that, when executed by at least one processor, perform acts comprising:

obtaining one or more operating-system processes, each process comprising a processor-executable instruction stream;

determining whether a subject operating-system process, when executing, has a potential to interfere with another operating-system process while both processes are executing, the subject operating-system process being one of the one or more operating-system processes.

10. One or more computer storage media as recited in claim 9 , the determining act being performed a priori execution of the processor-executable instruction stream of the subject operating-system process.

11. One or more computer storage media as recited in claim 9 , the determining act being performed during execution of the processor-executable instruction stream of the subject operating-system process.

12. One or more computer storage media as recited in claim 9 further comprising, in response to a determination that the subject operating-system process, when executed, has the potential to interfere with another executing process, adjusting the processor-executable instruction stream of the subject operating-system process to eliminate that potential interference.

13. One or more computer storage media as recited in claim 12 , the adjusting act being performed a priori execution of the processor-executable instruction stream of the subject operating-system process.

14. One or more computer storage media as recited in claim 12 , the adjusting act being performed during execution of the processor-executable instruction stream of the subject operating-system process.

15. One or more computer storage media as recited in claim 9 , further comprising executing two or more operating-system processes within a common processor-addressable space in a memory.

16. One or more computer storage media having processor-executable instructions that, when executed by at least one processor, perform acts comprising:

obtaining one or more operating-system processes, each process comprising a processor-executable instruction stream;

determining whether a subject operating-system process, when executing, has a potential to interfere with another operating-system process while both processes are executing within a common processor-addressable space in a memory, the subject operating-system process being one of the one or more operating-system processes.

17. One or more computer storage media as recited in claim 16 , the determining act being performed a priori execution of the processor-executable instruction stream of the subject operating-system process.

18. One or more computer storage media as recited in claim 16 , the determining act being performed during execution of the processor-executable instruction stream of the subject operating-system process.

19. One or more computer storage media as recited in claim 16 further comprising, in response to a determination that the subject operating-system process, when executed, has the potential to interfere with another executing process, adjusting the processor-executable instruction stream of the subject operating-system process to eliminate that potential interference.

20. One or more computer storage media as recited in claim 19 , the adjusting act being performed a priori or during execution of the processor-executable instruction stream of the subject operating-system process.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2025
From: KAYDON RING & SEAL, INC.
To: POLYMER CONCEPTS TECHNOLOGIES PBY, INC.
Reel/Frame 071502/0556 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2014
From: MICROSOFT CORPORATION
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 034543/0001 →