IP Library Granted Patent US 7,116,483
Granted Patent B2
US 7,116,483 · App. 11/122,555 · Granted Oct 3, 2006

Distributed bragg reflector and method of fabrication

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Quick Facts
Patent No.
US 7,116,483
App. No.
11/122,555
Granted
Oct 3, 2006
Kind
B2
Abstract

A distributed Bragg reflector and a method of fabricating the same incorporates a support for supporting the gaps against collapse. The method includes forming a plurality of alternating structure and sacrificial layers on a substrate. The structure and sacrificial layers are etched into at least one mesa protruding from the substrate. A support layer is formed on the at least one mesa leaving a portion of the structure and sacrificial layers exposed. At least a portion of at least one of the exposed sacrificial layers are etched from between the structure layers to form gaps between the structure layers.

Claims (14)

1. A method of fabricating a Bragg reflector comprising:

forming at least one structure layer and at least one sacrificial layer in alternating relation on a substrate;

etching the structure and sacrificial layers into at least one mesa protruding from the substrate;

forming a support layer on the at least one mesa leaving a portion of the structure and the sacrificial layers exposed; and

etching at least a portion of at least one of the exposed sacrificial layers to form a gap.

2. The method of claim 1 wherein forming a support layer on the at least one mesa comprises masking a portion of the mesa to prevent deposition of the support layer on the portion of the mesa.

3. The method of claim 2 wherein forming a support layer is depositing the support layer in a chemical vapor deposition process and wherein the mask is a dielectric mask.

4. The method of claim 1 wherein the material of the structure layer and the material of the support layer comprise substantially the same material.

5. The method of claim 1 wherein the structure layer material is different than a sacrificial layer material, and wherein etching at least a portion of at least one of the exposed sacrificial layers comprises etching the sacrificial layers without substantially etching the structure layers.

6. The method of claim 5 wherein etching further comprises etching without substantially etching the support layer.

7. The method of claim 1 wherein the sacrificial layer comprises a material selected from the group consisting of InGaAs, AlAs, and SiO 2 and the structure layer comprises a material selected from the group consisting of InP, GaAs, and Si.

8. The method of claim 7 wherein the support layer comprises a material selected from the group consisting of InP, GaAs, and Si.

9. The method of claim 1 further comprising doping at least a portion of the support layer to create an electrically conductive path.

10. The method of claim 1 further comprising doping at least a portion of the support layer to make at least the portion of the support layer electrically non-conductive.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 017206 FRAME: 0666. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038632/0662 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
Reel/Frame 017675/0294 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 017206/0666 →