Analog buffer, display device having the same, and method of driving the same
View Patent ↗An analog buffer, display device having the same and a method of driving the same are provided. The analog buffer applies an analog voltage to a load. The analog buffer includes a comparator and a transistor. The comparator is configured to compare an input voltage provided from an external device with the analog voltage applied to the load. The transistor is turned on to electrically charge the load when the analog voltage is lower than the input voltage or turned on to electrically discharge the load when the analog voltage is higher than the input voltage, and turned off when the analog voltage becomes substantially the same as the input voltage.
1. An analog buffer for applying an analog voltage to a load, comprising:
a comparator for comparing an input voltage received from an external device with the analog voltage applied to the load; and
a PMOS transistor having a first electrode that is electrically connected to a source voltage and a second electrode that is electrically connected to the load,
wherein the comparator comprises:
a first capacitor electrically charged first by the input voltage and then electrically discharged;
a second capacitor for feeding back the analog voltage applied to the load when the PMOS transistor is turned on; and
an inverter section for turning on the PMOS transistor when the first capacitor is electrically discharged and for turning off the PMOS transistor when the analog voltage that is fed back is substantially the same as the input voltage.
2. The analog buffer of claim 1 , wherein the inverter section comprises:
a first inverter having an input terminal that is electrically connected to the input voltage and an output terminal; and
a second inverter having an input terminal that is electrically connected to the output terminal of the first inverter, and an output terminal that is electrically connected to the PMOS transistor.
3. An analog buffer for applying an analog voltage to a load, comprising:
a comparator for comparing an input voltage received from an external device with the analog voltage applied to the load; and
a transistor for performing one of turning on to electrically charge the load when the analog voltage is lower than the input voltage and turning on to electrically discharge the load when the analog voltage is higher than the input voltage, and for turning off when the analog voltage is substantially the same as the input voltage,
wherein the transistor is an NMOS transistor having a first electrode that is electrically connected to a ground voltage and a second electrode that is electrically connected to the load.
4. The analog buffer of claim 3 , wherein the comparator comprises:
a first capacitor that is electrically discharged first by the ground voltage and then electrically charged by the input voltage;
a second capacitor for feeding back the analog voltage applied to the load when the NMOS transistor is turned on; and
an inverter section for turning on the NMOS transistor when the first capacitor is electrically charged and for turning off the NMOS transistor when the analog voltage that is fed back is substantially the same as the input voltage.
5. The analog buffer of claim 4 , wherein the inverter section comprises:
a first inverter having an input terminal that is electrically connected to the input voltage and an output terminal; and
a second inverter having an input terminal that is electrically connected to the output terminal of the first inverter, and an output terminal that is electrically connected to the NMOS transistor.