Thin film transistor, flat panel display having the same and a method of fabricating each
View Patent ↗A TFT having a dual buffer structure, a method of fabricating the same, and a flat panel display having the TFT, and a method of fabricating the same are provided. The TFT includes a first buffer layer formed of an amorphous silicon layer on a substrate, a second buffer layer formed on the first buffer layer. The TFT also includes a semiconductor layer formed on the second buffer layer and a gate electrode formed on the semiconductor layer. The dual buffer structure provides better barrier to impurities diffusing from the substrate, and also acts as a black matrix to reduce unwanted reflections and is a source of hydrogen to passivate other layers.
1. A thin film transistor (TFT), comprising:
a substrate;
a first buffer layer of amorphous silicon positioned on the substrate;
a second buffer layer positioned on the first buffer layer;
a semiconductor layer positioned on the second buffer layer; and
a gate electrode positioned on the semiconductor layer,
wherein the second buffer layer comprises silicon nitride (SiN x ).
2. The TFT of claim 1 , wherein the first buffer layer is about 500 Å to about 1000 Å thick.
3. The TFT of claim 1 , wherein the semiconductor layer comprises polycrystalline silicon.
4. The TFT of claim 1 , wherein the second buffer layer is about 1000 Å to about 3000 Å thick.
5. The TFT of claim 1 , wherein the first buffer layer comprises hydrogen.
6. A flat panel display, comprising:
a substrate including an emission region and a non-emission region;
a first buffer layer comprising amorphous silicon positioned on the non-emission region of the substrate and exposing the emission region of the substrate;
a second buffer layer positioned on at least the first buffer layer;
a semiconductor layer positioned on the second buffer layer; and
a gate electrode positioned on the semiconductor layer,
wherein the second buffer layer comprises silicon nitride (SiN x ).
7. The flat panel display of claim 6 , wherein the second buffer layer is about 1000 Å to about 3000 Å thick.
8. The flat panel display of claim 6 , wherein the first buffer layer comprises hydrogen.
9. The flat panel display of claim 6 , wherein the first buffer layer is about 500 Å to about 1000 Å thick.
10. The flat panel display of claim 6 , wherein the semiconductor layer comprises crystallized amorphous silicon.
11. The flat panel display of claim 10 , wherein the crystallized amorphous silicon is produced by one of an excimer laser annealing (ELA) method, a sequential lateral solidification (SLS) method, a metal induced crystallization (MIC) method, and a metal induced lateral crystallization (MILC) method.
12. The flat panel display of claim 6 , wherein the flat panel display is an organic electroluminescence display and a liquid crystal display.
13. A method for fabricating a thin film transistor (TFT), comprising:
forming a first buffer layer including amorphous silicon layer on a substrate;
forming a second buffer layer positioned on the first buffer layer;
forming a semiconductor layer positioned on the second buffer layer; and
forming a gate electrode positioned on the semiconductor layer,
wherein the second buffer layer comprises silicon nitride (SiN x ).
14. The method of claim 13 , wherein the first buffer layer comprises hydrogen.
15. The method of claim 13 , wherein the first buffer layer is about 500 Å to about 1000 Å thick.
16. The method of claim 13 , wherein the second buffer layer is about 1000 Å to about 3000 Å thick.
17. The method of claim 13 , wherein forming the semiconductor layer comprises forming and crystallizing an amorphous silicon layer on the second buffer layer.
18. The method of claim 17 , further comprising forming a source electrode and a drain electrode in electrical contact with the semiconductor layer.
19. The method of claim 17 , wherein forming the crystallized amorphous silicon layer includes any one crystallization process of an excimer laser annealing (ELA) process, a Sequential Lateral Solidification (SLS) process, a metal induced crystallization (MIC) process, and a metal induced lateral crystallization (MILC) process.