Method and apparatus to simulate automatic test equipment
A virtual tester that simulates automatic test equipment (ATE). A translator converts program code of the ATE to pattern information and timing information. The virtual tester tests a software representation of a circuit, based on the program code of the ATE. The virtual tester uses the pattern information and/or the timing information to test the software representation of the circuit.
1 . A method, comprising:
simulating automatic test equipment using a software representation of hardware characteristics of the automatic test equipment; and
testing a software representation of a circuit using the software representation of the hardware characteristics of the automatic test equipment, based on program code of the automatic test equipment.
2 . The method of claim 1 , further comprising converting the program code to pattern information and timing information, wherein testing the software representation of the circuit is based on the pattern information and the timing information.
3 . The method of claim 1 , further comprising validating the program code based on testing the software representation of the circuit.
4 . The method of claim 1 , further comprising simulating a device interface board using a software representation of the device interface board, wherein testing the software representation of the circuit includes testing the software representation of the circuit using the software representation of the device interface board.
5 . A method, comprising:
simulating automatic test equipment having a signal using a software representation of the automatic test equipment; and
determining at each cycle of the signal whether a hardware restriction violation occurs with respect to pattern information or timing information based on program code of the automatic test equipment.
6 . The method of claim 5 , wherein simulating the automatic test equipment includes selectively simulating the automatic test equipment using a software representation of the automatic test equipment in accordance with a first platform or a second platform.
7 . The method of claim 5 , further comprising validating the program code based on testing a software representation of a circuit.
8 . The method of claim 5 , further comprising simulating a device interface board using a software representation of the device interface board, wherein determining is based on the software representation of the device interface board.
9 . A method, comprising:
selectively simulating automatic test equipment in accordance with a first platform or a second platform using a software representation of the automatic test equipment; and
testing a software representation of a circuit using the software representation of the automatic test equipment, based on program code of the automatic test equipment.
10 . The method of claim 9 , wherein simulating the automatic test equipment includes simulating the automatic test equipment using a software representation of hardware characteristics of the automatic test equipment.
11 . The method of claim 10 , further comprising converting the program code to pattern information and timing information, wherein testing the software representation of the circuit is based on the pattern information and the timing information.
12 . The method of claim 9 , further comprising validating the program code based on testing the software representation of the circuit.
13 . The method of claim 9 , further comprising simulating a device interface board using a software representation of the device interface board, wherein testing the software representation of the circuit includes testing the software representation of the circuit using the software representation of the device interface board.
14 . An article of manufacture comprising a computer-readable medium for storing computer instructions that enable a processor-based system to:
simulate automatic test equipment using a software representation of hardware characteristics of the automatic test equipment; and
test a software representation of a circuit using the software representation of the hardware characteristics of the automatic test equipment, based on program code of the automatic test equipment.
15 . The article of claim 14 , further storing instructions to enable a processor-based system to convert the program code to pattern information and timing information, wherein the instructions to enable the processor-based system to test the software representation of the circuit include instructions to enable the processor-based system to test the software representation of the circuit based on the pattern information and the timing information.
16 . The article of claim 14 , further storing instructions to enable a processor-based system to validate the program code in response to the software representation of the circuit being tested.
17 . The article of claim 14 , further storing instructions to enable a processor-based system to simulate a device interface board using a software representation of the device interface board, wherein the instructions to enable the processor-based system to test the software representation of the circuit include instructions to enable the processor-based system to test the software representation of the circuit using the software representation of the device interface board.
18 . An article of manufacture comprising a computer-readable medium for storing computer instructions that enable a processor-based system to:
simulate automatic test equipment using a software representation of the automatic test equipment; and
determine at each cycle of a signal whether a hardware restriction violation occurs with respect to pattern information or timing information based on program code of the automatic test equipment.
19 . The article of claim 18 , wherein the instructions to enable the processor-based system to simulate the automatic test equipment include instructions to enable the processor-based system to simulate the automatic test equipment using a software representation of the automatic test equipment in accordance with a first platform or a second platform.
20 . The article of claim 18 , further storing instructions to enable a processor-based system to validate the program code in response to a software representation of a circuit being tested.
21 . The article of claim 18 , further storing instructions to enable a processor-based system to simulate a device interface board using a software representation of the device interface board.
22 . An article of manufacture comprising a computer-readable medium for storing computer instructions that enable a processor-based system to:
selectively simulate automatic test equipment in accordance with a first platform or a second platform using a software representation of the automatic test equipment; and
test a software representation of a circuit using the software representation of the automatic test equipment, based on program code of the automatic test equipment.
23 . The article of claim 22 , wherein the instructions to enable the processor-based system to simulate the automatic test equipment include instructions to enable the processor-based system to simulate the automatic test equipment using a software representation of hardware characteristics of the automatic test equipment.
24 . The article of claim 23 , further storing instructions to enable a processor-based system to convert the program code to pattern information and timing information, wherein the instructions to enable the processor-based system to test the software representation of the circuit include instructions to enable the processor-based system to test the software representation of the circuit based on the pattern information and the timing information.
25 . The article of claim 22 , further storing instructions to enable a processor-based system to validate the program code in response to the software representation of the circuit being tested.
26 . The article of claim 22 , further storing instructions to enable a processor-based system to simulate a device interface board using a software representation of the device interface board, wherein the instructions to enable the processor-based system to test the software representation of the circuit include instructions to enable the processor-based system to test the software representation of the circuit using the software representation of the device interface board.