Method and apparatus for electronically aligning capacitively coupled mini-bars
View Patent ↗One embodiment of the present invention provides a system that electronically aligns mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling. During operation, the system measures an alignment between a first chip and a second chip. The system then selects a group of transmitter mini-bars on the first chip to form a transmitter bit position based on the measured alignment. In this way, the system allows a data signal to be distributed to and transmitted by the mini-bars that form the transmitter bit position. The system also selects a group of receiver mini-bars on the second chip to form a receiver bit position based on the measured alignment. Next, the system associates transmitter bit positions on the first chip with proximate receiver bit positions on the second chip based on the measured alignment. In this way, the system allows data signals transmitted by the mini-bars within a transmitter bit position on the first chip to be collectively received by the mini-bars within an associated receiver bit position on the second chip.
1. A method for electronically aligning mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling, the method comprising:
measuring an alignment between a first chip and a second chip;
selecting a group of transmitter mini-bars on the first chip to form a transmitter bit position based on the measured alignment, thereby allowing a data signal to be distributed to and transmitted by the mini-bars within the transmitter bit position;
selecting a group of receiver mini-bars on the second chip to form a receiver bit position based on the measured alignment; and
associating transmitter bit positions on the first chip with proximate receiver bit positions on the second chip based on the measured alignment, thereby allowing data signals transmitted by the mini-bars that form a transmitter bit position on the first chip to be collectively received by the mini-bars within an associated receiver bit position on the second chip.
2. The method of claim 1 , further comprising switching data signals to associated transmitter bit positions on the first chip, so that the data signals are communicated through capacitive coupling to intended receiver bit positions on the second chip, which are proximate to the transmitter bit positions on the first chip.
3. The method of claim 1 , further comprising switching data signals received by the receiver mini-bars to associated receiver circuits, so that data signals belonging to the same receiver bit position are received collectively.
4. The method of claim 1 ,
wherein the transmifter mini-bars on the first chip form a number of columns, each comprising multiple parallel mini-bars, thereby allowing the first chip to adjust the transmitter bit positions in the direction along the columns;
wherein the receiver mini-bars on the second chip form a number of rows, each comprising multiple parallel mini-bars, thereby allowing the second chip to adjust the receiver bit positions in the direction along the rows; and
wherein the method further comprises aligning the first chip and the second chip so that the transmitter mini-bars on the first chip are orthogonal to the receiver mini-bars on the second chip, thereby allowing the position of an overlap between a transmitter bit position and a receiver bit position to be adjusted in two orthogonal directions.
5. The method of claim 4 , wherein selecting a group of transmitter mini-bars on the first chip to form the transmitter bit position involves:
assigning a number of consecutive transmitter mini-bars within a column to the transmitter bit position; and
coupling a data signal switched to the transmitter bit position to the group of consecutive transmitter mini-bars assigned to the transmitter bit position.
6. The method of claim 4 , wherein selecting a group of receiver mini-bars on the second chip to form the receiver bit position involves assigning a number of consecutive receiver mini-bars within a row to the receiver bit position.
7. The method of claim 4 , wherein the total number of transmitter mini-bars on the first chip exceeds the number of transmitter mini-bars selected to form transmitter bit positions, thereby providing room for relocating the transmitter bit positions; and
wherein the method further comprises coupling transmitter mini-bars which are not selected to form a transmitter bit position to a fixed voltage, such as a power-supply voltage or a ground voltage.
8. The method of claim 4 , wherein the total number of receiver mini-bars on the second chip exceeds the number of receiver mini-bars selected to form receiver bit positions, thereby providing room for relocating the receiver bit positions; and
wherein the method further comprises coupling receiver mini-bars which are not selected to form a receiver bit position to a fixed voltage, such as a power-supply voltage or a ground voltage.
9. A method for electronically aligning mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling, the method comprising:
receiving a first chip and a second chip;
selecting a group of transmitter mini-bars on the first chip to form a transmitter bit position, thereby allowing a data signal to be distributed to and transmitted by the mini-bars within the transmitter bit position;
selecting a group of receiver mini-bars on the second chip to form a receiver bit position; and
associating transmitter bit positions on the first chip with proximate receiver bit positions on the second chip, thereby allowing data signals transmitted by the mini-bars that form a transmitter bit position on the first chip to be collectively received by the mini-bars within an associated receiver bit position on the second chip.
10. The method of claim 9 , further comprising switching data signals to associated transmitter bit positions on the first chip, so that the data signals are communicated through capacitive coupling to intended receiver bit positions on the second chip, which are proximate to the transmitter bit positions on the first chip.
11. The method of claim 9 , further comprising switching data signals received by the receiver mini-bars to associated receiver circuits, so that data signals belonging to the same receiver bit position are received collectively.
12. The method of claim 9 ,
wherein the transmitter mini-bars on the first chip form a number of columns, each comprising multiple parallel mini-bars, thereby allowing the first chip to adjust the transmitter bit positions in the direction along the columns;
wherein the receiver mini-bars on the second chip form a number of rows, each comprising multiple parallel mini-bars, thereby allowing the second chip to adjust the receiver bit positions in the direction along the rows; and
wherein the method further comprises aligning the first chip and the second chip so that the transmitter mini-bars on the first chip are orthogonal to the receiver mini-bars on the second chip, thereby allowing the position of an overlap between a transmitter bit position and a receiver bit position to be adjusted in two orthogonal directions.