Precision floating gate reference temperature coefficient compensation circuit and method
View Patent ↗A circuit and corresponding method for a precision floating gate voltage reference that uses a feedback loop, conduction of tunnel devices, and a bandgap cell to accurately program a desired charge level on a floating gate and provide a predictable and programmable temperature coefficient parameter for such voltage reference. In one embodiment, a bandgap cell is coupled through a capacitor to the floating gate storage node for providing a voltage source for canceling the temperature coefficient (TC) of the storage capacitor. The circuit and method enables TC to be minimized by either choosing the proper voltage source characteristics or alternatively, by choosing the proper ratio of two capacitors. The bandgap cell can alternatively be designed to have positive TC (PTAT voltage sources) or negative TC (VBE junction).
1. In a floating gate voltage reference circuit having a floating gate for storing charge thereon, said charge appearing at a node coupled to an input of an opamp, wherein a voltage reference output is generated at the output of the opamp as a function of the charge on said floating gate, said circuit also having a first capacitor coupled to said node; a method for improving the accuracy of the voltage reference output of said circuit as a function of temperature, comprising:
supplying a voltage source providing an output having a predetermined and substantially constant Temperature Coefficient (TC); and
coupling a second capacitor in series between said voltage source and said node so as to compensate for the TC of said first capacitor; wherein said first capacitor and said second capacitor are the same type of capacitor.
2. The method of claim 1 , further comprising the step of adjusting the relative size ratio of said first and second capacitors.
3. The method of claim 1 , wherein said voltage source is generated using a bandgap cell.
4. The method of claim 3 , wherein said voltage source is programmable, and wherein said method further comprises the step of programming said voltage source during a set mode.
5. The method of claim 3 , wherein said voltage source provides a voltage proportional to absolute temperature (PTAT).
6. The method of claim 5 , wherein said PTAT voltage is programmable, and wherein said method further comprises the step of programming said PTAT voltage via a resistive DAC during a set mode.
7. The method of claim 3 , wherein said voltage source is a base to emitter voltage (VBE) source which provides a VBE voltage.
8. The method of claim 7 , wherein said VBE voltage is programmable, and wherein said method further comprises the step of programming said VBE voltage during a set mode.
9. The method of claim 8 , wherein said second capacitor comprises a capacitive DAC and said VBE voltage is programmable via said capacitive DAC.
10. The method of claim 1 , wherein the TC of said voltage reference output is less than 1 ppm per degree C.
11. The method of claim 1 , wherein said first and second capacitors are CMOS components.
12. A floating gate reference circuit for improving the accuracy of a voltage reference output of said circuit as a function of temperature comprising:
a floating gate for storing charge thereon, said charge appearing at a node coupled to an input of an opamp, wherein a voltage reference output is generated at the output of the opamp as a function of the charge on said floating gate;
a first capacitor coupled to said node;
a voltage source providing an output voltage having a predetermined and substantially constant TC; and
a second capacitor connected in series between said voltage source and said node so as to compensate for the TC of said first capacitor; wherein said first capacitor and said second capacitor are the same type.
13. The reference circuit of claim 12 , wherein the relative size ratio of said first and second capacitors is adjusted.
14. The reference circuit of claim 12 , wherein said voltage source is generated using a bandgap cell.
15. The reference circuit of claim 12 , wherein said voltage source is programmable during a set mode.
16. The reference circuit of claim 12 , wherein said voltage source provides a voltage proportional to absolute temperature (PTAT).
17. The reference circuit of claim 16 , wherein said voltage source comprises a resistive DAC such that said PTAT voltage is programmable during a set mode.
18. The reference circuit of claim 12 , wherein said voltage source is a base to emitter voltage (VBE) source which provides a VBE voltage.
19. The reference circuit of claim 18 , wherein said VBE voltage is programmable.
20. The reference circuit of claim 18 , wherein said second capacitor comprises a capacitive DAC such that said VBE voltage is programmable via said capacitive DAC during a set mode.
21. The reference circuit of claim 12 , wherein the TC of said voltage reference output is less than 1 ppm per degree C.
22. The reference circuit of claim 12 , wherein said first and second capacitors are CMOS components.
23. In a floating gate voltage reference circuit having a floating gate for storing charge thereon, said charge appearing at a node coupled to a first input of an opamp, wherein a voltage reference output is generated at the output of the opamp as a function of the charge on said floating gate, said circuit also having a first capacitor coupled to said node; a method for improving the accuracy of the voltage reference output of said circuit as a function of temperature, comprising:
coupling a second capacitor to a second input of said opamp; wherein said first capacitor and said second capacitor are the same type of capacitor;
supplying a voltage source providing an output having a predetermined and substantially constant Temperature Coefficient (TC); and
connecting said voltage source in series with said second capacitor so as to compensate for the TC of said first capacitor.
24. The method of claim 23 , wherein said second capacitor is programmable via a capacitive DAC.