IP Library Granted Patent US 7,154,179
Granted Patent B2
US 7,154,179 · App. 11/129,794 · Granted Dec 26, 2006

Semiconductor device

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Quick Facts
Patent No.
US 7,154,179
App. No.
11/129,794
Granted
Dec 26, 2006
Kind
B2
Abstract

A semiconductor device, wherein an increase of a capacity between wiring layers is suppressed, reliability of wiring and property of withstand voltage of a diffusion prevention insulation film can be improved and the wiring resistance can be maintained low, is provided by comprising an interlayer insulation film formed on a substrate, a wiring formed on a trench pattern formed on the interlayer insulation film, and a diffusion prevention insulation film formed on an upper surfaces of the interlayer insulation film including the wiring and preventing diffusion of metal from the wiring; wherein the diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer, wherein the lowermost layer is formed so as to contact the upper surfaces of the interlayer insulation layer including the wiring, the uppermost layer constitutes an uppermost portion of the diffusion prevention insulation film, and the middle layer has a lower relative dielectric constant than those of the lowermost layer and the uppermost layer.

Claims (28)

1. A semiconductor device comprising:

an insulation film formed on a substrate,

a conductive layer formed on a trench pattern formed on said insulation film, and

a diffusion prevention insulation film formed on upper surfaces of said insulation film and said conductive layer and preventing diffusion of metal from said conductive layer; wherein

said diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer and has a film thickness of 35 nm or thinner, wherein said lowermost layer is formed so as to contact said upper surfaces of said insulation layer including said conductive layer, said uppermost layer constitutes an uppermost portion of said diffusion prevention insulation film, and said middle layer has a lower relative dielectric constant than those of said lowermost layer and said uppermost layer.

2. A semiconductor device as set forth in claim 1 , wherein

relative dielectric constants of said lowermost layer and said uppermost layer are 4.0 or higher but lower than 6.0 and a relative dielectric constant of said middle layer is lower than 4.0.

3. A semiconductor device as set forth in claim 1 , wherein

said lowermost layer comprises a material containing nitrogen.

4. A semiconductor device as set forth in claim 1 , wherein

an adhesive layer is formed between at least one of:

said lowermost layer and said middle layer, and

said middle layer and said uppermost layer,

the adhesive layer enhancing adhesiveness between said middle layer and at least one of said lowermost layer and said uppermost layer.

5. A semiconductor device comprising:

an insulation film formed on a substrate,

a conductive layer formed on a trench pattern formed on said insulation film, and

a diffusion prevention insulation film formed on upper surfaces of said insulation film and said conductive layer and preventing diffusion of metal from said conductive layer; wherein

said diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer, wherein said lowermost layer is formed so as to contact said upper surfaces of said insulation layer including said conductive layer, said uppermost layer constitutes an uppermost portion of said diffusion prevention insulation film, and said middle layer is SiC and has a lower relative dielectric constant than those of said lowermost layer and said uppermost layer.

6. A semiconductor device as set forth in claim 5 , wherein

relative dielectric constants of said lowermost layer and said uppermost layer are 4.0 or higher but lower than 6.0 and a relative dielectric constant of said middle layer is lower than 4.0.

7. A semiconductor device as set forth in claim 5 , wherein

said lowermost layer comprises a material containing nitrogen.

8. A semiconductor device as set forth in claim 5 , wherein

an adhesive layer is formed between at least one of:

said lowermost layer and said middle layer, and

said middle layer and said uppermost layer,

the adhesive layer enhancing adhesiveness between said middle layer and at least one of said lowermost layer and said uppermost layer.

Assignments (4)
CHANGE OF NAME Recorded Oct 6, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 057725/0116 →
MERGER AND CHANGE OF NAME Recorded Oct 1, 2021
From: TOSHIBA MEMORY CORPORATION; K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 057684/0921 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 044327/0544 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2005
From: TABUCHI, KIYOTAKA; MIYAJIMA, HIDESHI; MASUDA, HIDEAKI
To: SONY CORPORATION; KABUSHIKI KAISHA TOSHIBA
Reel/Frame 017046/0473 →