IP Library Granted Patent US 7,404,013
Granted Patent B1
US 7,404,013 · App. 11/130,944 · Granted Jul 22, 2008

Pass-through information transfers inserted after a continued primitive in serial communications between a device and a host

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Quick Facts
Patent No.
US 7,404,013
App. No.
11/130,944
Granted
Jul 22, 2008
Kind
B1
Abstract

A device communicatively coupled to a host in a Serial Advanced Technology Attachment (SATA) format. The device includes a processor to control operations in the device and a serial interface to control serial communication with the host in accordance with the SATA format. The serial interface, after the transmission of a continued primitive, inserts pass-through information to the host within or outside of a frame information structure (FIS). If the host is not pass-through enabled, the host ignores the pass-through information. However, if the host is pass-through enabled, the host recognizes the pass-through information.

Claims (42)

1. A device communicatively coupled to a host in a Serial Advanced Technology Attachment (SATA) format, the device comprising:

a processor to control operations in the device; and

a serial interface to control serial communication with the host in accordance with the SATA format, including:

after a transmission of a continued primitive by the device, inserting pass-through information to the host by replacing pseudo-random data with a message information structure (MIS) that includes the pass-through information, prior to the device sending a primitive;

wherein the host is one of pass-through enabled or not pass-through enabled, and if the host is not pass-through enabled, the host ignores the pass-through information, whereas if the host is pass-through enabled, the host recognize the pass-through information.

2. The device of claim 1 , wherein the MIS transmitted by the device includes a start of message (SOM) primitive sequence to indicate a beginning of the pass-through information to be transmitted and an end of message (EOM) primitive sequence to indicate that the pass-through information has been transmitted.

3. The device of claim 1 , wherein the MIS and the pass-through information are scrambled.

4. The device of claim 1 , wherein the pass-through information includes at least one of message, data, status, or a command.

5. The device of claim 1 , wherein the inserting of the pass-through information between the device and the host occurs at a link layer.

6. The device of claim 1 , wherein the message information structure (MIS) and the pass-through information are transmitted during an idle (SYNC) phase.

7. The device of claim 1 , wherein the message information structure (MIS) and the pass-through information are transmitted during at least one of a transmit ready (X_RDY) HOLD phase, a HOLD Acknowledge phase, a wait for termination (WTRM) phase, a receipt ready (R_RDY), a receipt in progress (R_IP) phase, or a receipt OK (R_OK) phase.

8. The device of claim 1 , wherein the transmission of the pass-through information between the device and the host occurs in a simplex mode.

9. The device of claim 1 , wherein the transmission of the pass-through information between the device and the host occurs in a half-duplex mode.

10. The device of claim 1 , wherein the transmission of the pass-through information between the device and the host occurs in a full duplex mode.

11. The device of claim 1 , wherein the device is a disk drive.

12. A host communicatively coupled to a device in a Serial Advanced Technology Attachment (SATA) format, the host comprising:

a processor to control operations in the host; and

a serial interface to control serial communication with the device in accordance with the SATA format, including:

after a transmission of a continued primitive by the host, inserting pass-through information to the device by replacing pseudo-random data with a message information structure (MIS) that includes the pass-through information, prior to the host sending a primitive;

wherein the device is one of pass-through enabled or not pass-through enabled, and if the device is not pass-through enabled, the device ignores the pass-through information, whereas if the device is pass-through enabled, the device recognize the pass-through information.

13. The host of claim 12 , wherein the MIS transmitted by the host includes a start of message (SOM) primitive sequence to indicate a beginning of the pass-through information to be transmitted and an end of message (EOM) primitive sequence to indicate that the pass-through information has been transmitted.

14. The host of claim 12 , wherein the MIS and the pass-through information are scrambled.

15. The host of claim 12 , wherein the pass-through information includes at least one of message, data, status, or a command.

16. The host of claim 12 , wherein the inserting of the pass-through information between the host and the device occurs at a link layer.

17. The host of claim 12 , wherein the message information structure (MIS) and the pass-through information are transmitted during an idle (SYNC) phase.

18. The host of claim 12 , wherein the message information structure (MIS) and the pass-through information are transmitted during at least one of a transmit ready (X_RDY) HOLD phase, a HOLD Acknowledge phase, a wait for termination (WTRM) phase, a receipt ready (R_RDY), a receipt in progress (R_IP) phase, or a receipt OK (R_OK) phase.

19. The host of claim 12 , wherein the transmission of the pass-through information between the host and the device occurs in a simplex mode.

20. The host of claim 12 , wherein the transmission of the pass-through information between the host and the device occurs in a half-duplex mode.

21. The host of claim 12 , wherein the transmission of the pass-through information between the host and the device occurs in a full duplex mode.

22. The host of claim 12 , wherein the device is a disk drive.

23. A device communicatively coupled to a host in a Serial Advanced Technology Attachment (SATA) format, the device comprising:

a processor to control operations in the device; and

a serial interface to control serial communication with the host in accordance with the SATA format, including:

after a transmission of a continued primitive by the host, the host inserts pass-through information to the device by replacing pseudo-random data with a message information structure (MIS) that includes the pass-through information, prior to the host sending a primitive;

wherein the device is one of pass-through enabled or not pass-through enabled, and if the device is not pass-through enabled, the device ignores the pass-through information, whereas if the device is pass-through enabled, the device recognize the pass-through information.

24. The device of claim 23 , wherein the MIS transmitted by the device includes a start of message (SOM) primitive sequence to indicate a beginning of the pass-through information to be transmitted and an end of message (EOM) primitive sequence to indicate that the pass-through information has been transmitted.

25. The device of claim 23 , wherein the MIS and the pass-through information are scrambled.

26. The device of claim 23 , wherein the pass-through information includes at least one of message, data, status, or a command.

27. The device of claim 23 , wherein the inserting of the pass-through information between the device and the host occurs at a link layer.

28. The device of claim 23 , wherein the message information structure (MIS) and the pass-through information are transmitted during an idle (SYNC) phase.

29. The device of claim 23 , wherein the message information structure (MIS) and the pass-through information are transmitted during at least one of a transmit ready (X_RDY) HOLD phase, a HOLD Acknowledge phase, a wait for termination (WTRM) phase, a receipt ready (R_RDY), a receipt in progress (R_IP) phase, or a receipt OK (R_OK) phase.

30. The device of claim 23 , wherein the device is a disk drive.

Assignments (6)
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2005
From: MASIEWICZ, JOHN C.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 016581/0955 →