IP Library Granted Patent US 7,250,376
Granted Patent B2
US 7,250,376 · App. 11/132,289 · Granted Jul 31, 2007

Method for fabricating semiconductor integrated circuit device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,250,376
App. No.
11/132,289
Granted
Jul 31, 2007
Kind
B2
Abstract

A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.

Claims (24)

1. A method for fabricating a semiconductor integrated circuit device, comprising the steps of:

(a) synthesizing moisture in a moisture synthesizing portion, at a first temperature, from oxygen and hydrogen, by use of a catalyst;

(b) while keeping the moisture in a gaseous state, transferring the synthesized moisture into a wafer heat treatment chamber to form a wet oxidative atmosphere around a wafer in the wafer heat treatment chamber; and

(c) performing thermal oxidation to a silicon member on or over a first major surface of the wafer in the wet oxidative atmosphere in the wafer heat treatment chamber by heating the wafer up to a second temperature higher than the first temperature to form an insulating film,

wherein the transport of the synthesized moisture in step (b) is performed while monitoring hydrogen gas by a gas sensor between the moisture synthesizing portion and the wafer heat treatment chamber.

2. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein said wet oxidative atmosphere includes oxygen gas.

3. A method for fabricating a semiconductor integrated circuit device according to claim 2 , wherein the insulating film is a gate insulating film of an insulated gate field effect transistor.

4. A method for fabricating a semiconductor integrated circuit device according to claim 3 , wherein a thickness of the insulating film of said insulated gate field effect transistor is not more than 5 nm, and the gate length thereof is not more than 0.25 μm.

5. A method for fabricating a semiconductor integrated circuit device according to claim 3 , wherein a thickness of the insulating film of said insulated gate field effect transistor is not more than 3 nm.

6. A method for fabricating a semiconductor integrated circuit device according to claim 3 , wherein the gate insulating film of the insulated gate field effect transistor is a tunneling insulating film of a flash memory device.

7. A method for fabricating a semiconductor integrated circuit device according to claim 2 , wherein the thermal oxidation is performed while feeding the wet oxidative atmosphere around the wafer in the wafer heat treatment chamber.

8. A method for fabricating a semiconductor integrated circuit device according to claim 2 , wherein the gas sensor is a contact combustion hydrogen sensor.

9. A method for fabricating a semiconductor integrated circuit device according to claim 7 , wherein the gas sensor is a contact combustion hydrogen sensor.

10. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein said wet oxidative atmosphere includes oxygen gas as a principal gas component.

11. A method for fabricating a semiconductor integrated circuit device according to claim 10 , wherein the thermal oxidation is performed while feeding the wet oxidative atmosphere around the wafer in the wafer heat treatment chamber.

12. A method for fabricating a semiconductor integrated circuit device according to claim 11 , wherein the gas sensor is a contact combustion hydrogen sensor.

13. A method for fabricating a semiconductor integrated circuit device according to claim 10 , wherein the gas sensor is a contact combustion hydrogen sensor.

14. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein the wet oxidative atmosphere includes moisture not more than 40%, and the remainder is oxygen gas.

15. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein the silicon member is the first major surface of the wafer itself.

16. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein the silicon member is located over one or more intermediate films on the first major surface of the wafer.

17. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein the first temperature is not higher than about 450° C., and the second temperature is not lower than 800° C.

18. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein the thermal oxidation is performed while feeding the wet oxidative atmosphere around the wafer in the wafer heat treatment chamber.

19. A method for fabricating a semiconductor integrated circuit device according to claim 18 , wherein the gas sensor is a contact combustion hydrogen sensor.

20. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein the gas sensor is a contact combustion hydrogen sensor.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Jul 30, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025204/0512 →