IP Library Granted Patent US 7,843,410
Granted Patent B2
US 7,843,410 · App. 11/134,007 · Granted Nov 30, 2010

Method and device for electrically programmable display

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,843,410
App. No.
11/134,007
Granted
Nov 30, 2010
Kind
B2
Abstract

One embodiment includes a display of interferometric modulators having a configurable resolution characteristic. Selected rows and/or columns are interconnected via a switch. The switch can include a fuse, antifuse, transistor, and the like. Depending on a desired resolution for a display, the switches can be placed in an “open” or “closed” state. Advantageously, using the switches, a display can readily be configured for differing modes of resolution. Furthermore, using the switches, a display can be configured to electrically connect certain rows or columns in the display such that the connected rows or columns can be driven simultaneously by a common voltage source.

Claims (35)

1. An apparatus having a display, the apparatus comprising:

an array comprising a plurality of rows and columns of interferometric modulators; and

a plurality of electrical conductors, each of the electrical conductors connecting to one of the plurality rows or columns, at least two of the conductors being configured to be selectively electrically interconnected by a switch mean thereby modifying a resolution characteristic of at least a region of the display by altering the number of interferometric modulators that are individually addressable,

wherein the at least two conductors are connected respectively to rows or columns that are physically non-adjacent with respect to each other.

2. The apparatus of claim 1 , wherein the at least two conductors are connected via, at least in part, an antifuse.

3. The apparatus of claim 2 , wherein the antifuse is fabricated during a fabrication process of the array of interferometric modulators.

4. The apparatus of claim 1 , wherein the at least two conductors are connected via, at least in part, a transistor.

5. The apparatus of claim 1 , further comprising:

a processor that is in electrical communication with said display, said processor being configured to process image data;

a memory device in electrical communication with said processor.

6. The display system as recited in claim 5 , further comprising:

a first controller configured to send at least one signal to said display; and

a second controller configured to send at least a portion of said image data to said first controller.

7. The display system as recited in claim 5 , further comprising:

an image source module configured to send said image data to said processor.

8. The display system as recited in claim 7 , wherein said image source module comprises at least one of a receiver, transceiver, and transmitter.

9. The display system as recited in claim 5 , further comprising:

an input device configured to receive input data and to communicate said input data to said processor.

10. A display, comprising:

an array comprising a plurality of rows and columns of interferometric modulators; and

a plurality of electrical conductors, each of the electrical conductors connecting to one of the plurality rows or columns, at least two of the conductors being electrically connected together, at least two of the conductors being configured connected together by a switch mean, at least two of the conductors being configured to be selectively electrically disconnected by said switch mean thereby modifying a resolution characteristic of at least a region of the display by altering the number of interferometric modulators that are individually addressable,

wherein the at least two conductors are connected respectively to rows or columns that are physically non-adjacent with respect to each other.

11. The display of claim 10 , wherein the at least two conductors are connected via, at least in part, a fuse.

12. The display of claim 11 , wherein the fuse is fabricated during a fabrication process of the array of interferometric modulators.

13. The display of claim 10 , wherein the at least two conductors are connected via, at least in part, a transistor.

14. An apparatus having a display, the apparatus comprising:

an array comprising a plurality of rows and columns of interferometric modulators; and

a plurality of electrical conductors, each of the electrical conductors connecting to one of the plurality rows or columns, at least two of the conductors being configured to be selectively electrically interconnected by a switch mean thereby modifying a resolution characteristic of at least a region of the display by altering the number of interferometric modulators that are individually addressable,

wherein the at least two conductors are connected via, at least in part, an antifuse.

15. The apparatus of claim 14 , wherein the antifuse is fabricated during a fabrication process of the array of interferometric modulators.

16. A display, comprising:

an array comprising a plurality of rows and columns of interferometric modulators; and

a plurality of electrical conductors, each of the electrical conductors connecting to one of the plurality rows or columns, at least two of the conductors being electrically connected together, at least two of the conductors being configured connected together by a switch mean, at least two of the conductors being configured to be selectively electrically disconnected by said switch mean thereby modifying a resolution characteristic of at least a region of the display by altering the number of interferometric modulators that are individually addressable,

wherein the at least two conductors are connected via, at least in part, a fuse.

17. The display of claim 16 , wherein the fuse is fabricated during a fabrication process of the array of interferometric modulators.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2016
From: QUALCOMM MEMS TECHNOLOGIES, INC.
To: SNAPTRACK, INC.
Reel/Frame 039891/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2009
From: IDC, LLC
To: QUALCOMM MEMS TECHNOLOGIES, INC.
Reel/Frame 023435/0918 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2005
From: FLOYD, PHILIP D.
To: IDC, LLC
Reel/Frame 016876/0977 →